Dual damascene process

专利名称：Dual damascene process

发明人：Meng-Hung Chen,Yu-Sheng Shu,Ming-Hung

Lo,Chung-Yuan Lee

申请号：US10229734申请日：20020827

公开号：US20030211727A1公开日：20031113

专利附图：

摘要：A dual damascene process for producing interconnects. A dielectric layer isformed over the surface of a semiconductor substrate which comprises conductive layersor MOS devices. The dielectric layer is patterned to form trench openings and a metal

layer is deposited over the dielectric layer to fill the plurality of trenches. A photoresistlayer is formed over the metal layer and defined to form via hole patterns above thetrenches. The metal layer and the dielectric layer are etched with the patternedphotoresist layer as a mask to form a plurality of via holes exposing the underlyingconductive layer or MOS devices and a dual damascene opening is formed.

申请人：NANYA TECHNOLOGY CORPORATION

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