ON-CHIP TEST CIRCUIT FOR ASSESSING CHIP INTEGRITY

专利名称：ON-CHIP TEST CIRCUIT FOR ASSESSING

CHIP INTEGRITY

发明人：Jui-Meng Jao,Chien-Li Kuo申请号：US11161304申请日：20050729

公开号：US20070023915A1公开日：20070201

专利附图：

摘要：A semiconductor chip includes an active inner circuit; a die seal ring surroundingthe active inner circuit; a first circuit structure fabricated at a first corner of the

semiconductor chip outside the die seal ring and electrically connected to the die seal,

wherein the first circuit structure has a first solder pad; and a second circuit structurefabricated at a second corner of the semiconductor chip outside the die seal ring andelectrically connected to the die seal, wherein the second circuit structure has a secondsolder pad.

申请人：Jui-Meng Jao,Chien-Li Kuo

地址：Miao- Li Hsien TW,Hsin-Chu City TW

国籍：TW,TW

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