Single-chip microcomputer

专利名称：Single-chip microcomputer

发明人：Shumpei Kawasaki,Yasushi Akao,Kouki

Noguchi,Atsushi Hasegawa,HiroshiOhsuga,Keiichi Kurakazu,Kiyoshi

Matsubara,Akio Hayakawa,Yoshitaka Ito

申请号：US09918625申请日：20010730

公开号：US20020007430A1公开日：20020117

专利附图：

摘要：A single-chip microcomputer comprising: a first bus having a central processing

unit and a cache memory connected therewith; a second bus having a dynamic memoryaccess control circuit and an external bus interface connected therewith; a break

controller for connecting the first bus and the second bus selectively; a third bus having aperipheral module connected therewith and having a lower-speed bus cycle than the buscycles of the first and second buses; and a bus state controller for effecting a datatransfer and a synchronization between the second bus and the third bus. The single-chipmicrocomputer has the three divided internal buses to reduce the load capacity upon thesignal transmission paths so that the signal transmission can be accomplished at a highspeed. Moreover, the peripheral module required to have no operation speed is isolatedso that the power dissipation can be reduced.

申请人：KAWASAKI SHUMPEI,AKAO YASUSHI,NOGUCHI KOUKI,HASEGAWAATSUSHI,OHSUGA HIROSHI,KURAKAZU KEIICHI,MATSUBARA KIYOSHI,HAYAKAWAAKIO,ITO YOSHITAKA

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