PWM Current−Mode
Controller for Universal
Off−Line Supplies FeaturingStandby and Short CircuitProtection
Housed in SO-8 or DIP8 package, the NCP1203 represents a majorleap toward ultra-compact Switch-Mode Power Supplies andrepresents an excellent candidate to replace the UC384X devices.Thanks to its proprietary SMARTMOSt Very High VoltageTechnology, the circuit allows the implementation of completeoff-line AC/DC adapters, battery charger and a high-power SMPSwith few external components.
With an internal structure operating at a fixed 40 kHz, 60 kHz or100 kHz switching frequency, the controller features a high-voltagestart-up FET which ensures a clean and loss-less start-up sequence.Its current-mode control naturally provides good audio-susceptibilityand inherent pulse-by-pulse control.
When the current set point falls below a given value, e.g. the outputpower demand diminishes, the IC automatically enters the so-calledskip cycle mode and provides improved efficiency at light loadswhile offering excellent performance in standby conditions. Becausethis occurs at a user adjustable low peak current, no acoustic noisetakes place.
The NCP1203 also includes an efficient protective circuitry which,in presence of an output over load condition, disables the outputpulses while the device enters a safe burst mode, trying to restart.Once the default has gone, the device auto-recovers. Finally, atemperature shutdown with hysteresis helps building safe and robustpower supplies.
Features
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MARKINGDIAGRAMS
8
81
SO-8
D1, D2 SUFFIXCASE 751
18
PDIP-8N SUFFIXCASE 626
1
xxAWL, LYY, YWW, W
= Specific Device Code= Assembly Location= Wafer Lot= Year
= Work Week
XXXXXXXXX AWL YYWWXXXXXXALYW
8
1PIN CONNECTIONS
Adj1FB2CS3Gnd4(Top View)
8HV7NC6VCC5Drv
•••••••••••
High-Voltage Start-Up Current Source
Auto-Recovery Internal Output Short-Circuit ProtectionExtremely Low No-Load Standby Power
Current-Mode with Adjustable Skip-Cycle CapabilityInternal Leading Edge Blanking250 mA Peak Current Capability
Internally Fixed Frequency at 40 kHz, 60 kHz and 100 kHzDirect Optocoupler Connection
Undervoltage Lockout at 7.8 V Typical
SPICE Models Available for TRANsient and AC AnalysisPin to Pin Compatible with NCP1200
ORDERING INFORMATION
DeviceNCP1203P60NCP1203D60R2NCP1203P40NCP1203D40R2NCP1203P100NCP1203D100R2
PackagePDIP8SO-8PDIP8SO-8PDIP8SO-8
Shipping50 Units/Tube2500/Tape & Reel50 Units/Tube2500/Tape & Reel50 Units/Tube2500/Tape & Reel
Applications
•AC/DC Adapters for Notebooks, etc.•Offline Battery Chargers
•Auxiliary Power Supplies (USB, Appliances, TVs, etc.)
© Semiconductor Components Industries, LLC, 20031
February, 2003- Rev. 3
Publication Order Number:
NCP1203/D
NCP1203
*+NCP120312EMIFILTERUNIVERSALINPUT34AdjFBCSVCCGndDrvHV8765Aux.+VOUT
+*Please refer to the application information sectionFigure 1. Typical Application Example
PIN FUNCTION DESCRIPTION
Pin No.1Pin NameAdjFunctionAdjust the skipping peak currentPin DescriptionThis pin lets you adjust the level at which the cycle skipping process takesplace. Shorting this pin to ground, permanently disables the skip cyclefeature.By connecting an optocoupler to this pin, the peak current setpoint isadjusted accordingly to the output power demand. Skip cycle occurs whenFB falls below Vpin1.This pin senses the primary current and routes it to the internal comparatorvia an L.E.B.-The driver’s output to an external MOSFET.This pin is connected to an external bulk capacitor of typically 22 mF.This unconnected pin ensures adequate creepage distance.Connected to the high-voltage rail, this pin injects a constant current intothe VCC capacitor during the start-up sequence.2FBSets the peak current setpoint345678CSGndDrvVCCNCHVCurrent sense inputThe IC groundDriving pulsesSupplies the IC-Ensure a clean and losslessstart-up sequencehttp://onsemi.com
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NCP1203
Adj1HV CURRENTSOURCE80 k1.2 VSKIP CYCLECOMPARATORINTERNAL VCC24 kCURRENTSENSE3250 nsL.E.B.40-60-100 kHzCLOCKSETQ FLIP-FLOPDCmax = 80%RESETUVLO HIGH AND LOWINTERNAL REGULATORHV8FB2+−NC7QVCCOVERLOADMANAGEMENT620 kGROUND4+-VREF57 k+−Drv1 V±250 mA525 kFigure 2. Internal Circuit Architecture
MAXIMUM RATINGS
RatingPower Supply VoltagePower Supply Voltage on all other pins except Pin 5 (Drv), Pin 6 (VCC) and Pin 8 (HV)Maximum Current into all pins except Pin 6 (VCC) and Pin 8 (HV) when 10 V ESD diodes are activatedThermal Resistance Junction-to-Air, PDIP8 VersionThermal Resistance Junction-to-Air, SOIC VersionMaximum Junction TemperatureTemperature ShutdownHysteresis in ShutdownStorage Temperature RangeESD Capability, HBM Model, All pins except Pin 6 (VCC) and Pin 8 (HV)ESD Capability, Machine ModelMaximum Voltage on Pin 6 (VCC) and Pin 8 (HV) Decoupled to Ground with 10 mFSymbolVCC, Drv--Value16-0.3 to 105.010017815017030-60 to +1502.0200450UnitVVmA°C/W°C/W°C°C°C°CKVVVRθJARθJATJMAX------http://onsemi.com
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NCP1203
ELECTRICAL CHARACTERISTICS (For typical values TJ = 25°C, for min/max values TJ = 0°C to +125°C, Max TJ = 150°C,
VCC = 11 V unless otherwise noted.)CharacteristicSupply Section (All frequency versions, otherwise noted)Turn-on Threshold Level, VCC Going UpMinimum Operating Voltage after Turn-onVCC Decreasing Level at which the Latch-off Phase EndsInternal IC Consumption, No Output Load on Pin 5Internal IC Consumption, 1.0 nF Output Load on Pin 5,FSW = 40 kHzInternal IC Consumption, 1.0 nF Output Load on Pin 5,FSW = 60 kHzInternal IC Consumption, 1.0 nF Output Load on Pin 5,FSW = 100 kHzInternal IC Consumption, Latch-off Phase, VCC = 6.0 VInternal Start-Up Current Source (Pin 8 biased at 50 V)High-Voltage Current Source, VCC = 10 VHigh-Voltage Current Source, VCC = 0Drive OutputOutput Voltage Rise-Time @ CL = 1.0 nF, 10-90% ofOutput SignalOutput Voltage Fall-Time @ CL = 1.0 nF, 10-90% ofOutput SignalSource ResistanceSink ResistanceCurrent Comparator (Pin 5 loaded unless otherwise noted)Input Bias Current @ 1.0 V Input Level on Pin 3Maximum Internal Current Setpoint (Note 3)Default Internal Current Setpoint for Skip Cycle OperationPropagation Delay from Current Detection to Gate OFFStateLeading Edge Blanking Duration (Note 3)Internal Oscillator (VCC = 11 V, Pin 5 loaded by 1 nF)Oscillation Frequency, 40 kHz VersionOscillation Frequency, 60 kHz VersionOscillation Frequency, 100 kHz VersionMaximum Duty-CycleFeedback Section (VCC = 11 V, Pin 5 unloaded)Internal Pull-up ResistorPin 3 to Current Setpoint Division RatioSkip Cycle GenerationDefault Skip Mode LevelPin 1 Internal Output ImpedanceVskipZout111.0-1.2221.4-VkWRupIratio2---203.3--kW-fOSCfOSCfOSCDmax----37579074426510380477311587kHzkHzkHz%IIBILimitILskipTDELTLEB33333-0.85---0.020.9236090230-1.0-160-mAVmVnsnsTrTfROHROL5555--275.067284010--6120nsnsWWIC1IC2883.5-6.0119.0-mAmAVCC(on)VCC(min)VCClatchICC1ICC2ICC2ICC2ICC36666666612.27.2------12.87.84.97501.21.42.0250148.4-880(Note 1)1.4(Note 2)1.6(Note 2)2.2(Note 2)-VVVmAmAmAmAmASymbolPinMinTypMaxUnit1.Max value at TJ = 0°C.2.Maximum value @ TJ = 25°C, please see characterization curves.3.Pin 5 loaded by 1 nF.
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NCP1203
14.013.8VCC(on) THRESHOLD (V)VCC(min) LEVEL (V)75
13.613.413.213.012.812.612.412.2
-25
0
25
50
100
125
8.48.28.07.87.67.47.2-25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 3. VCC(on) Threshold versus
Temperature
Figure 4. VCC(min) Level versus Temperature
ICC, 1 nF LOAD CONSUMPTION (mA)ICC, CURRENT CONSUMPTION (mA)1000950900850800750700650600550500-2540 kHz100 kHz60 kHz2.01.8
100 kHz1.6
60 kHz1.4
1.2
40 kHz1.0-2502550751001250255075100125TEMPERATURE (°C)TEMPERATURE (°C)
Figure 5. IC Current Consumption (No Load)
versus TemperatureFigure 6. ICC Consumption (Loaded by 1 nF)
versus Temperature
8.0HV CURRENT SOURCE (mA)7.5
40 & 60 kHz6.56.05.55.04.54.0-250255075100125100 kHzICC @ VCC = 6 V (mA)7.0
400350
300
250
200150-25
0255075100125
TEMPERATURE (°C)TEMPERATURE (°C)
Figure 7. HV Current Source at VCC = 10 V
versus TemperatureFigure 8. IC Consumption at VCC = 6 V
versus Temperature
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NCP1203
60DRIVE SOURCE RESISTANCE (W)DRIVE SINK RESISTANCE (W)5075555045403530252015-250251001252018161412108642-250255075100125TEMPERATURE (°C)TEMPERATURE (°C)Figure 9. Drive Source Resistance versusTemperatureFigure 10. Drive Sink Resistance versusTemperature0.99MAXIMUM CURRENT SETPOINT (V)0.970.950.930.910.890.870.85
-250255075100125f, FREQUENCY (kHz)120100 kHz1008060 kHz6040 kHz40200-250255075100125TEMPERATURE (°C)TEMPERATURE (°C)
Figure 11. Maximum Current Setpoint versus
Temperature
Figure 12. Frequency versus Temperature
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NCP1203
APPLICATION INFORMATION
Introduction
The NCP1203 implements a standard current modearchitecture where the switch-off time is dictated by thepeak current setpoint. This component represents the idealcandidate where low part-count is the key parameter,particularly in low-cost AC/DC adapters, auxiliary suppliesetc. Thanks to its high-performance SMARTMOSHigh-Voltage technology, the NCP1203 incorporates all thenecessary components normally needed in UC384X basedsupplies: timing components, feedback devices, low-passfilter and start-up device. This later point emphasizes thefact that ON Semiconductor’s NCP1203 does not need anexternal start-up resistance but supplies the start-up currentdirectly from the high-voltage rail. On the other hand, moreand more applications are requiring low no-load standbypower, e.g. for AC/DC adapters, VCRs etc. UC384X serieshave a lot of difficulty to reduce the switching losses at lowpower levels. NCP1203 elegantly solves this problem by
skipping unwanted switching cycles at a user-adjustablepower level. By ensuring that skip cycles take place at lowpeak current, the device ensures quiet, noise free operation.Finally, an auto-recovery output short-circuit protection(OCP) prevents from any lethal thermal runaway inoverload conditions.
Start-Up Sequence
When the power supply is first powered from the mainsoutlet, the internal current source (typically 6.0 mA) isbiased and charges up the VCC capacitor. When the voltageon this VCC capacitor reaches the VCC(on) level (typically12.8 V), the current source turns off and no longer wastesany power. At this time, the VCC capacitor only supplies thecontroller and the auxiliary supply is supposed to take overbefore VCC collapses below VCC(min). Figure 13 shows theinternal arrangement of this structure:
812.8 V/4.9 V
+−6 mA or 06CVCC4HVAux
Figure 13. The Current Source Brings VCC Above 12.8 V and then Turns Off
Once the power supply has started, the VCC shall beconstrained below 16 V, which is the maximum rating onpin 6. Figure 14 portrays a typical start-up sequence with aVCC regulated at 12.5 V:
13.5
12.8 VREGULATION12.5
11.5
10.5
9.5
3.00 M8.00 M13.0 Mt, TIME (sec)
18.0 M23.0 MFigure 14. A Typical Start-Up Sequence for
the NCP1203
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NCP1203
Current-Mode Operation
As the UC384X series, the NCP1203 features awell-known current mode control architecture whichprovides superior input audio-susceptibility compared totraditional voltage-mode controllers. Primary currentpulse-by-pulse checking together with a fast over currentcomparator offers greater security in the event of a difficultfault condition, e.g. a saturating transformer.
Adjustable Skip Cycle Level
transformer … You can thus select cheap magneticcomponents free of noise problems.
External MOSFET Connection
By offering the ability to tailor the level at which the skipcycle takes place, the designer can make sure that the skipoperation only occurs at low peak current. This pointguarantees a noise-free operation with cheap transformers.Skip cycle offers a proven mean to reduce the standby powerin no or light loads situations.
Wide Switching-Frequency Offer
By leaving the external MOSFET external to the IC, youcan select avalanche proof devices which, in certain cases(e.g. low output powers), let you work without an activeclamping network. Also, by controlling the MOSFET gatesignal flow, you have an option to slow down the devicecommutation, therefore reducing the amount ofElectroMagnetic Interference (EMI).
SPICE Model
A dedicated model to run transient cycle-by-cyclesimulations is available but also an averaged version to helpyou closing the loop. Ready-to-use templates can bedownloaded in OrCAD’s Pspice and INTUSOFT’s from ONSemiconductor web site, NCP1203 related section.
Overload Operation
Four different options are available: 40 kHz - 65 kHz –100 kHz. Depending on the application, the designer canpick up the right device to help reducing magnetics orimprove the EMI signature before reaching the 150 kHzstarting point.
Over Current Protection (OCP)
When the auxiliary winding collapses below UVLOlow,the controller stops switching and reduces its consumption.It stays in this mode until Vcc reaches 4.9 V typical, wherethe start-up source is reactivated and a new start-upsequence is attempted. The power supply is thus operated inburst mode and avoids any lethal thermal runaway. Whenthe default goes way, the power supply automaticallyresumes operation.
Wide Duty-Cycle Operation
Wide mains operation requires a large duty-cycleexcursion. The NCP1203 can go up to 80% typically.
Low Standby-Power
If SMPS naturally exhibit a good efficiency at nominalload, they begin to be less efficient when the output powerdemand diminishes. By skipping un-needed switchingcycles, the NCP1203 drastically reduces the power wastedduring light load conditions. In no-load conditions, theNCP1203 allows the total standby power to easily reach nextInternational Energy Agency (IEA) recommendations.
No Acoustic Noise while Operating
Instead of skipping cycles at high peak currents, theNCP1203 waits until the peak current demand falls below auser-adjustable 1/3rd of the maximum limit. As a result,cycle skipping can take place without having a singing
In applications where the output current is purposely notcontrolled (e.g. wall adapters delivering raw DC level), it isinteresting to implement a true short-circuit protection. Ashort-circuit actually forces the output voltage to be at a lowlevel, preventing a bias current to circulate in theoptocoupler LED. As a result, the auxiliary voltage alsodecreases because it also operates in Flyback and thusduplicates the output voltage, providing the leakageinductance between windings is kept low. To account for thissituation and properly protect the power supply, NCP1203hosts a dedicated overload detection circuitry. Onceactivated, this circuitry imposes to deliver pulses in a burstmanner with a low duty-cycle. The system auto-recoverswhen the fault condition disappears.
During the start-up phase, the peak current is pushed tothe maximum until the output voltage reaches its target andthe feedback loop takes over. The auxiliary voltage takesplace after a few switching cycles and self-supplies the IC.In presence of a short circuit on the output, the auxiliaryvoltage will go down until it crosses the undervoltagelockout level of typically 7.8 V. When this happens,NCP1203 immediately stops the switching pulses andunbias all unnecessary logical blocks. The overallconsumption drops, while keeping the gate grounded, andthe VCC slowly falls down. As soon as VCC reaches typically4.8 V, the start-up source turns-on again and a new start-upsequence occurs, bringing VCC toward 12.8 V as an attemptto restart. If the default has gone, then the power supplynormally restarts. If not, a new protective burst is initiated,shielding the SMPS from any runaway. Figure 15, on thefollowing page, portrays the typical operating signals inshort circuit.
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NCP1203
12.8 V7.8 VVCC
4.9 VDRIVING PULSES
Figure 15. Typical Waveforms in Short Circuit Conditions
Calculating the VCC Capacitor
1·Lp·Ip2·Fsw+3.8W2The VCC capacitor can be calculated knowing the ICconsumption as soon as VCC reaches 12.8 V. Suppose that aNCP1203P60 is used and drives a MOSFET with a 30 nCtotal gate charge (Qg). The total average current is thus madeof ICC1 (700 mA) plus the driver current, Fsw x Qg or1.8 mA. The total current is therefore 2.5 mA. The ∆Vavailable to fully start-up the circuit (e.g. never reach the7.8 V UVLO during power on) is 12.8–7.8 = 5 V. We havea capacitor who then needs to supply the NCP1203 with2.5 mA during a given time until the auxiliary supply takesover. Suppose that this time was measured at around 15 ms.CVCC is calculated using the equation C+Dt·i or
Cw7.5mF. Select a 22 mF/16 V and this will fit.Skipping Cycle Mode
DVIf this IC enters skip cycle mode with a bunch length of10 ms over a recurrent period of 100 ms, then the total powertransfer is: 3.8.0.1+380mW.
To better understand how this skip cycle mode takes place,a look at the operation mode versus the FB levelimmediately gives the necessary insight:
FB4.2 V, FB Pin OpenNORMAL CURRENTMODE OPERATION3.2 V, UpperDynamic RangeThe NCP1203 automatically skips switching cycles whenthe output power demand drops below a given level. This isaccomplished by monitoring the FB pin. In normaloperation, pin 2 imposes a peak current accordingly to theload value. If the load demand decreases, the internal loopasks for less peak current. When this setpoint reaches adetermined level (Vpin 1), the IC prevents the current fromdecreasing further down and starts to blank the outputpulses: the IC enters the so-called skip cycle mode, alsonamed controlled burst operation. The power transfer nowdepends upon the width of the pulse bunches (Figure 17).Suppose we have the following component values:Lp, primary inductance = 350 mHFsw , switching frequency = 61 kHzIp skip = 600 mA (or 333 mV/Rsense)The theoretical power transfer is therefore:
SKIP CYCLE OPERATIONIP(min) = 333 mV/RSENSE1 VFigure 16.
When FB is above the skip cycle threshold (1.0 V bydefault), the peak current cannot exceed 1.0 V/Rsense.When the IC enters the skip cycle mode, the peak currentcannot go below Vpin1/3.3/Rsense. The user still has theflexibility to alter this 1.0 V by either shunting pin 1 toground through a resistor or raising it through a resistor upto the desired level. Grounding pin 1 permanentlyinvalidates the skip cycle operation. However, given theextremely low standby power the controller can reach, thePWM in no-load conditions can quickly enter the minimumton and still transfer too much power. An instability can takeplace. We recommend in that case to leave a little bit of skiplevel to always allow 0% duty-cycle.
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NCP1203
Power P1
Power P2
Power P3
Figure 17. Output Pulses at Various Power Levels (X = 5.0 ms/div) P1 t P2 t P3
300 M
MAX PEAKCURRENT200 M
SKIP CYCLECURRENT LIMIT100 M
0
315.40882.701.450 M2.017 M2.585 M
Figure 18. The Skip Cycle Takes Place at Low Peak Currents which Guaranties Noise-Free Operation
We recommend a pin1 operation between 400 mV and1.3 V that will fix the skip peak current level between120 mV/Rsense and 390 mV/Rsense.
Non-Latching Shutdown
In some cases, it might be desirable to shut off the parttemporarily and authorize its restart once the default has
disappeared. This option can easily be accomplishedthrough a single NPN bipolar transistor wired between FBand ground. By pulling FB below the Adj pin 1 level, theoutput pulses are disabled as long as FB is pulled belowpin 1. As soon as FB is relaxed, the IC resumes its operation.Figure 19 depicts the application example:
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NCP1203
12ON/OFFQ1348765Figure 19. Another Way of Shutting Down the IC without a Definitive Latch-Off State
Full Latching Shutdown
Other applications require a full latching shutdown, e.g.when an abnormal situation is detected (over temp orovervoltage). This feature can easily be implementedthrough two external transistors wired as a discrete SCR.
OVPWhen the VCC level exceeds the zener breakdown voltage,the NPN biases the PNP and fires the equivalent SCR,permanently bringing down the FB pin. The switchingpulses are disabled until the user unplugs the power supply.
Rhold12 kNCP120312348765CVCCLAux
10 k0.1 mF10 kFigure 20. Two Bipolars Ensure a Total Latch-Off of the SMPS in Presence of an OVP
Rhold ensures that the SCR stays on when fired. The biascurrent flowing through Rhold should be small enough to letthe VCC ramp up (12.8 V) and down (4.9 V) when the SCRis fired. The NPN base can also receive a signal from atemperature sensor. Typical bipolars can be MMBT2222and MMBT2907 for the discrete latch. The MMBT3946features two bipolars NPN+PNP in the same package andcould also be used.
Protecting the Controller Against Negative Spikes
As with any controller built upon a CMOS technology, itis the designer’s duty to avoid the presence of negativespikes on sensitive pins. Negative signals have the bad habitto forward bias the controller substrate and induce erraticbehaviors. Sometimes, the injection can be so strong thatinternal parasitic SCRs are triggered, engenderingirremediable damages to the IC if they are a low impedancepath is offered between VCC and GND. If the current sense
pin is often the seat of such spurious signals, thehigh-voltage pin can also be the source of problems incertain circumstances. During the turn-off sequence, e.g.when the user un-plugs the power supply, the controller isstill fed by its VCC capacitor and keeps activating theMOSFET ON and OFF with a peak current limited byRsense. Unfortunately, if the quality coefficient Q of theresonating network formed by Lp and Cbulk is low (e.g. theMOSFET Rdson + Rsense are small), conditions are met tomake the circuit resonate and thus negatively bias thecontroller. Since we are talking about ms pulses, the amountof injected charge (Q = I x t) immediately latches thecontroller which brutally discharges its VCC capacitor. If thisVCC capacitor is of sufficient value, its stored energydamages the controller. Figure 21 depicts a typical negativeshot occurring on the HV pin where the brutal VCC dischargetestifies for latch-up.
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NCP1203
Figure 21. A negative spike takes place on the Bulk capacitor at the switch-off sequence
Simple and inexpensive cures exist to prevent frominternal parasitic SCR activation. One of them consists ininserting a resistor in series with the high-voltage pin tokeep the negative current to the lowest when the bulkbecomes negative (Figure 22). Please note that the negativespike is clamped to –2 x Vf due to the diode bridge. Also, thepower dissipation of this resistor is extremely small since itonly heats up during the start-up sequence.
Rbulk> 4.7 k
+Cbulk12348765+CVCC
Another option (Figure 23) consists in wiring a diode fromVCC to the bulk capacitor to force VCC to reach UVLOlowsooner and thus stops the switching activity before the bulkcapacitor gets deeply discharged. For security reasons, twodiodes can be connected in series.
+Cbulk12348765D3
1N4007+CVCC
Figure 22. A simple resistor in series avoids any
latch-up in the controllerFigure 23. or a diode forces VCC to reach
UVLOlow sooner
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NCP1203
PACKAGE DIMENSIONS
PDIP-8N SUFFIXCASE 626-05ISSUE L
NOTES:
1.DIMENSION L TO CENTER OF LEAD WHENFORMED PARALLEL.
2.PACKAGE CONTOUR OPTIONAL (ROUND ORSQUARE CORNERS).
3.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.
DIMABCDFGHJKLMNMILLIMETERSMINMAX9.4010.166.106.603.944.450.380.511.021.782.54 BSC0.761.270.200.302.923.437.62 BSC−−−10 _0.761.01INCHESMINMAX0.3700.4000.2400.2600.1550.1750.0150.0200.0400.0700.100 BSC0.0300.0500.0080.0120.1150.1350.300 BSC−−−10 _0.0300.04085-B-14FNOTE 2-A-LC-T-SEATINGPLANEJNDKMMTAMHG0.13 (0.005)BMhttp://onsemi.com
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NCP1203
PACKAGE DIMENSIONS
SO-8
D1, D2 SUFFIXCASE 751-07ISSUE AA
NOTES:
1.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.
2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSION A AND B DO NOT INCLUDE MOLDPROTRUSION.
4.MAXIMUM MOLD PROTRUSION 0.15 (0.006) PERSIDE.
5.DIMENSION D DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL INEXCESS OF THE D DIMENSION AT MAXIMUMMATERIAL CONDITION.
6.751−01 THRU 751−06 ARE OBSOLETE. NEWSTANDAARD IS 751−07
MILLIMETERSMINMAX4.805.003.804.001.351.750.330.511.27 BSC0.100.250.190.250.401.270 _8 _0.250.505.806.20INCHESMINMAX0.1890.1970.1500.1570.0530.0690.0130.0200.050 BSC0.0040.0100.0070.0100.0160.0500 _8 _0.0100.0200.2280.244-X-A85B1S40.25 (0.010)MYM-Y-GKC-Z-HD0.25 (0.010)
MSEATINGPLANENX 45_0.10 (0.004)MJZY
SX
SDIMABCDGHJKMNSSMARTMOS is a trademark of Motorola, Inc.
The product described herein (NCP1203), may be covered by one or more of the following U.S. patents: 6,271,737; 6,385,060. There maybe other patents pending.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to makechanges without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for anyparticular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and allliability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/orspecifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must bevalidated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicationsintended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or deathmay occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLCand its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney feesarising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges thatSCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
JAPAN: ON Semiconductor, Japan Customer Focus Center2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051Phone: 81-3-5773-3850
ON Semiconductor Website: http://onsemi.comFor additional information, please contact your localSales Representative.http://onsemi.com14NCP1203/D
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