FeaTures ■ ■ ■ ■ ■ ■ ■ ■LTC4355Positive High VoltageIdeal Diode-OR with Input Supply and Fuse MonitorsDescripTionThe LTC®4355 is a positive voltage ideal diode-OR controller that drives two external N-channel MOSFETs. Forming the diode-OR with N-channel MOSFETs instead of Schottky diodes reduces power consumption, heat dissipation and PC board area. With the LTC4355, power sources can easily be ORed together to increase total system reliability. The LTC4355 can diode-OR two positive supplies or the return paths of two negative supplies, such as in a –48V system. In the forward direction the LTC4355 controls the voltage drop across the MOSFET to ensure smooth current transfer from one path to the other without oscillation. If a power source fails or is shorted, fast turnoff minimizes reverse current transients. Power fault detection indicates if the input supplies are not in regulation, the inline fuses are blown, or the voltages across the MOSFETs are greater than the fault threshold.Replaces Power Schottky DiodesControls N-Channel MOSFETs0.5µs Turn-Off Time Limits Peak Fault CurrentWide Operating Voltage Range: 9V to 80VSmooth Switchover without OscillationNo Reverse DC CurrentMonitors VIN, Fuse, and MOSFET DiodeAvailable in 14-Lead (4mm × 3mm) DFN and 16-Lead SO PackagesapplicaTions ■ ■ ■ ■High Availability SystemsAdvancedTCA® (ATCA) Systems+48V and –48V Distributed Power SystemsTelecom Infrastructure, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Typical applicaTion+48V Diode-ORVIN1 = +48VVIN2 = +48V340k7A7AFDB3632TOLOADFDB3632POWER DISSIPATION (W)22k340kIN1MON1SETMON212.7kGND12.7kLTC4355GNDGATE1IN2GATE2OUTVDSFLTFUSEFLT1FUSEFLT2PWRFLT1PWRFLT222k22k22k22k65DIODE (MBR10100)4321FET (FDB3632) GREEN LEDsPANASONIC LN1351C4355 TA01Power Dissipation vs Load CurrentPOWERSAVED00246CURRENT (A)8104355 TA024355faLTC4355absoluTe MaxiMuM raTings(Notes 1, 2)Supply Voltages IN1, IN2 ...............................................–0.3V to 100V OUT .....................................................–0.3V to 100VInput Voltages MON1, MON2, SET ..................................–0.3V to 7VOutput Voltages GATE1 (Note 3) ...................VIN1 – 0.2V to VIN1 + 13V GATE2 (Note 3) ...................VIN2 – 0.2V to VIN2 + 13V PWRFLT1, PWRFLT2, VDSFLT, FUSEFLT1, FUSEFLT2 ...............................–0.3V to 8VOperating Temperature Range LTC4355C ................................................0°C to 70°C LTC4355I .............................................–40°C to 85°CStorage Temperature Range DFN Package ......................................–65°C to 125°C SO Package ........................................–65°C to 150°CLead Temperature (Soldering, 10 sec) SO Package .......................................................300°Cpin conFiguraTionTOP VIEWIN1GATE1OUTGATE2IN2VDSFLTGND12345671514MON113PWRFLT112FUSEFLT111FUSEFLT210PWRFLT29MON28SETIN11GATE12NC3OUT4NC5GATE26IN27NC8 TOP VIEW16MON115PWRFLT114FUSEFLT113FUSEFLT212PWRFLT211MON210SET9GNDDE14 PACKAGE14-LEAD (4mm × 3mm) PLASTIC DFNTJMAX = 125°C, θJA = 43°C/W EXPOSED PAD (PIN 15) PCB GND CONNECTION OPTIONALS PACKAGE16-LEAD PLASTIC SOTJMAX = 125°C, θJA = 75°C/W orDer inForMaTionLEAD FREE FINISHLTC4355CDE#PBFLTC4355IDE#PBFLTC4355CS#PBFLTC4355IS#PBFTAPE AND REELLTC4355CDE#TRPBFLTC4355IDE#TRPBFLTC4355CS#TRPBFLTC4355IS#TRPBFPART MARKING*43554355LTC4355CSLTC4355ISPACKAGE DESCRIPTION14-Lead (4mm × 3mm) Plastic DFN14-Lead (4mm × 3mm) Plastic DFN16-Lead Plastic SO16-Lead Plastic SOTEMPERATURE RANGE0°C to 70°C–40°C to 85°C0°C to 70°C–40°C to 85°CConsult LTC Marketing for parts specified with wider operating temperature ranges. *Temperature grades are identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts.For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/4355faLTC4355elecTrical characTerisTics SYMBOLVOUTIOUTIINxDVGATExIGATEx(UP)IGATEx(DN)tOFFVMONx(TH)VMONx(HYST)IMONx(IN)VINx(TH)VINx(HYST)DVSD DVSD(FLT) PARAMETEROperating Supply RangeSupply CurrentINx Pin Input CurrentExternal N-Channel Gate Drive (VGATEx – VINx)External N-Channel Gate Pull-Up CurrentExternal N-Channel Gate Pulldown in Fault ConditionGate Turn-Off TimeMONx Pin Threshold VoltageMONx Pin Hysteresis VoltageMONx Pin Input CurrentINx Pin Threshold VoltageINx Pin Hysteresis VoltageSource-Drain Regulation Voltage (VINx – VOUT )Short-Circuit Fault Voltage (VINx – VOUT) RisingVGATEx – VINx = 2.5VSET = 0V SET = 100kW SET = Hi-ZIPWRFLTx, IFUSEFLTx, IVDSFLT = 5mAVPWRFLTx, VFUSEFLTx, VVDSFLT = 5VVMONx = 1.23VVINx RisingGATE HighVOUT = 20V to 80V VOUT = 9V to 20VVGATE = VINx, VINx – VOUT = 100mVGate Drive Off, VGATEx = VINx +5V–VINx – VOUT = 55mV|––1V VGATEx – VINx < 1VThe ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. 9V < VOUT < 80V, unless otherwise noted.CONDITIONS●●●● ●●●●●●●●●●● ● ●MIN9TYP2MAX8031.218 18–26UNITSVmAmAV VµAA0.510 4.5–1410.614 6–2020.30.41.24545±14150550.3 0.6 1.6 200±15150µsVmVµAVmVmVV V VmVmVµAkWkWMWVMONx Rising1.20910325100.2 0.4 1.3 1.2273003.575250.25 0.5 1.5301000DVSD(FLT)(HYST) Short-Circuit Fault Hysteresis VoltageV`F`L`TI`F`L`TRSET(L)RSET(M)RSET(H)PWRFLTx, FUSEFLTx, VDSFLT Pins Output LowPWRFLTx, FUSEFLTx, VDSFLT Pins Leakage CurrentSET Resistance Range for DVSD(FLT) = 0.25VSET Resistance Range for DVSD(FLT) = 0.5VSET Resistance Range for DVSD(FLT) = 1.5V●●●●●0501Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.Note 2: All currents into pins are positive, all voltages are referenced to GND unless otherwise specified.Note 3: The GATEx pins are internally limited to a minimum of 13V above INx. Driving these pins beyond the clamp may damage the part.4355faLTC4355Typical perForMance characTerisTics IOUT vs VOUT2.0VOUT = VIN1.0 IIN vs VINVIN = VOUT20 IGATE vs DVSDVGATE = 2.5V1.5IOUT (mA)IIN (mA)0.75IGATE (µA)040VIN (V)4355 G014355 G0201.00.5–200.50.25–40002040VOUT (V)60800206080–60–50050VSD (mV)1001504355 G03DVGATE vs IGATE15VIN > 18V0.3Fault Output Low vs Load Current150Fault Output Low vs TemperatureIFLT = 5mA12510DVGATE (V)VFLT (V)VFLT (V)0.1750010IFLT (mA)4355 G044355 G05VIN = 12VVIN = 9V0.210050051015IGATE (µA)202551550–50500TEMPERATURE (°C)1004355 G06FET Turn-Off Time vs GATE Capacitance500VGATE < VIN + 1VDVSD = 50mV –1V500FET Turn-Off Time vs Initial OverdriveVIN = 48VDVSD = VINITIAL –1V2000FET Turn-Off Time vs Final OverdriveVIN = 48VDVSD = 50mV VFINAL4004001500tPD (ns)tOFF (ns)tPD (ns)300300100020020010010050000102020CGATE (nF)40504355 G07000.20.60.4VINITIAL (V)0.81.04355 G080–1.0–0.8–0.4–0.6VFINAL (V)–0.204355 G094355faLTC4355pin FuncTions(DE/S Packages)EXPOSED PAD (Pin 15, DE Package Only): Exposed pad may be left open or connected to GND.FUSEFLTx (Pins 11,12/13,14): Fuse Fault Outputs. Open-drain output that pulls to GND when VINx < 3.5V, indicating that the fuse has blown open. Otherwise, this output is high-impedance. Connect to GND if unused.GATEx (Pins 2,4/2,6): Gate Drive Outputs. The GATE pins pull high, enhancing the N-channel MOSFET when the load current creates more than 25mV of voltage drop across the MOSFET. When the load current is small, the gates are actively driven to maintain 25mV across the MOSFET. If the reverse current develops more than –25mV of voltage drop across a MOSFET, a fast pulldown circuit quickly connects the GATE pin to the IN pin, turning off the MOSFET. Limit the capacitance between the GATE and IN pins to less than 0.1µF.GND (7/9): Device Ground.INx (Pins 1,5/1,7): Input Voltages and GATE Fast Pulldown Returns. The IN pins are the anodes of the ideal diodes and connect to the sources of the N-channel MOSFETs. The voltages sensed at these pins are used to control the source-drain voltages across the MOSFETs and are used by the fault detection circuits that drive the PWRFLT, FUSEFLT, and VDSFLT pins. The GATE fast pulldown cur-rent is returned through the IN pins. Connect these pins as close to the MOSFET sources as possible. Connect to OUT if unused.MONx (Pins 9,14/11,16): Input Supply Monitors. These pins are used to sense the input supply voltages. Connect these pins to external resistive dividers between the input supplies and GND. If VMONx falls below 1.23V, the PWRFLTx pin pulls to GND. Connect to GND if unused.OUT (Pin 3/4): Drain Voltage Sense and Positive Sup-ply Input. OUT is the diode-OR output of IN1 and IN2. It connects to the common drain connection of the N-chan-nel MOSFETs. The voltage sensed at this pin is used to control the source-drain voltages across the MOSFETs and is used by the fault detection circuits that drive the PWRFLT and VDSFLT pins. The LTC4355 is powered from the OUT pin.PWRFLTx (Pins 10,13/12,15): Power Fault Outputs. Open-drain output that pulls to GND when VMONx falls below 1.23V or the forward voltage across the MOSFET exceeds DVSD(FLT). When VMONx is above 1.23V and the forward voltage across the MOSFET is less than DVSD(FLT), PWRFLTx is high-impedance. Connect to GND if unused.SET (Pin 8/10): DVSD(FLT) Threshold Configuration In-put. Tying SET to GND, to a 100kW resistor connected to GND, or leaving SET open configures the DVSD(FLT) forward voltage fault threshold to 250mV, 500mV, or 1.5V respectively. When the voltage across a MOSFET exceeds DVSD(FLT), the VSDFLT pin and at least one of the PWRFLT pins pull to GND.VDSFLT (Pin 6, DE Package Only): MOSFET Fault Output. Open-drain output that pulls to GND when the forward volt-age across either MOSFET exceeds DVSD(FLT). PWRFLT1 or PWRFLT2 also pulls low to indicate which MOSFET’s forward voltage drop exceeds DVSD(FLT). Otherwise, this pin is high-impedance. Connect to GND if unused.4355faLTC4355block DiagraMIN1 GATE1 OUT GATE2 IN2 –+GATE1AMPGATE2AMP25mV25mVDVSD(FLT)+–+–DVSD1(FLT)FAULT–DVSD(FLT)+–+––+–DVSD(FLT) =0.25V, 0.5V OR 1.5V+VDSFLT FUSEFLT1 PWRFLT1 MON1 DVSD2(FLT)FAULT+––+FUSE1FAULT3.5V3.5V–+–+FUSE2FAULT+++1.23V GND SET+–––MON1 FUSEFLT2 PWRFLT2MON2+–1.23V MON24355 BD4355faLTC4355operaTionHigh availability systems often employ parallel-connected power supplies or battery feeds to achieve redundancy and enhance system reliability. ORing diodes have been a popular means of connecting these supplies at the point of load. The disadvantage of this approach is the forward voltage drop and resulting efficiency loss. This drop reduces the available supply voltage and dissipates significant power. Using N-channel MOSFETs to replace Schottky diodes reduces the power dissipation and eliminates the need for costly heat sinks or large thermal layouts in high power applications.The LTC4355 is a positive voltage diode-OR controller that drives two external N-channel MOSFETs as pass transis-tors to replace ORing diodes. The IN and OUT pins form the anodes and cathodes of the ideal diodes. The source pins of the external MOSFETs are connected to the IN pins. The drains of the MOSFETs are connected together at the OUT pin, which is the positive supply of the device. The gates of the external MOSFETs are driven by the LTC4355 to regulate the voltage drop across the pass transistors. At power-up, the initial load current flows through the body diode of the MOSFET with the higher INx voltage. The associated GATEx pin immediately ramps up and turns on the MOSFET. The amplifier tries to regulate the voltage drop across the source and drain connections to 25mV. If the load current causes more than 25mV of drop, the MOSFET gate is driven fully on and the voltage drop is equal to RDS(ON) • ILOAD. When the power supply voltages are nearly equal, this regulation technique ensures that the load current is smoothly shared between the MOSFETs without oscil-lation. The current flowing through each pass trans- istor depends on the RDS(ON) of each MOSFET and the output impedances of the supplies. In the event of a supply failure, such as if the supply that is conducting most or all of the current is shorted to GND, reverse current flows temporarily through the MOSFET that is on. This current is sourced from any load capacitance and from the second supply through the body diode of the other MOSFET. The LTC4355 quickly responds to this condition, turning off the MOSFET in about 500ns. This fast turn-off prevents the reverse current from ramping up to a damaging level. In the case where the forward voltage drop exceeds the configurable fault threshold, DVSD(FLT), the VDSFLT pin pulls low. Using this pin to shunt current away from an LED or optocoupler provides an indication that a pass transistor has either failed or has excessive forward current. Additionally, in this condition the PWRFLT1 or PWRFLT2 pin pulls low to identify the faulting channel. The PWRFLT pins also indicate if an input supply is within regulation. When VMON1 < 1.23V or VMON2 < 1.23V, the corresponding PWRFLT pin pulls low to indicate that the input supply is low, turning off an optional LED or optocoupler. The FUSEFLT pins indicate the status of input fuses. If the voltage at one of the IN pins is less than 3.5V, the corresponding FUSEFLT pin pulls low. The IN pins sink a minimum of 0.5mA to guarantee that the IN pin will pull low when the input fuse is blown open. Note that the FUSEFLT pin will activate if the input supply is less than 3.5V even if the fuse is intact.4355faLTC4355applicaTions inForMaTionMOSFET SelectionThe LTC4355 drives N-channel MOSFETs to conduct the load current. The important features of the MOSFETs are on-resistance RDS(ON), the maximum drain-source voltage VDSS, and the threshold voltage.The gate drive for the MOSFET is guaranteed to be greater than 4.5V when the supply voltage at VOUT is between 9V and 20V. When the supply voltage at VOUT is greater than 20V, the gate drive is guaranteed to be greater than 10V. The gate drive is limited to less than 18V. This allows the use of logic level threshold N-channel MOSFETs and standard N-channel MOSFETs above 20V. An external zener diode can be used to clamp the potential from the MOSFET’s gate to source if the rated breakdown voltage is less than 18V. See the circuit in Figure 4 for an example. The maximum allowable drain-source voltage, BVDSS, must be higher than the supply voltages. If an input is connected to GND, the full supply voltage will appear across the MOSFET.If the voltage drop across either MOSFET exceeds the configurable DVSD(FLT) fault threshold, the VDS-FLT pin and the PWRFLT pin corresponding to the faulting channel pull low. The RDS(ON) should be small enough to conduct the maximum load current while not triggering a fault, and to stay within the MOSFET’s power rating at the maximum load current (I2 • RDS(ON)).Fault Conditions The LTC4355 monitors fault conditions and shunts current away from LEDs or optocouplers, turning each one off to indicate a specific fault condition (see Table 1).When the voltage drop across the pass transistor is higher than the configurable DVSD(FLT) fault threshold, the internal pulldown at the VDSFLT pin and the PWRFLT1 or PWRFLT2 pin corresponding to the faulting channel turns on. The DVSD(FLT) threshold is configured by the SET pin. Tying SET to GND, tying SET to a 100kW resistor connected to GND, or floating SET configures DVSD(FLT) to 250mV, 500mV, or 1.5V respectively.Fault conditions that may cause a high voltage across the pass transistor include: a MOSFET open on the higher supply, excessive MOSFET current due to overcurrent on the load or a shorted MOSFET on the lower supply. During startup or when a switchover between supplies occurs, the VDSFLT pin and PWRFLT1 or PWRFLT2 pin may momentarily indicate that the forward voltage has exceeded the programmed threshold during the short interval when the MOSFET gate ramps up and the body diode conducts. The PWRFLT pins are additionally used to indicate if either input supply is below its normal regulation range. If the voltage at the MON1 or MON2 pin is less than VMON(TH), typically 1.23V, the corresponding PWRFLT1 or PWRFLT2 pin will pull low. A resistive divider connected to the input supply drives the MON pin for the corresponding supply, configuring the PWRFLT threshold for that supply. Be sure to account for the tolerance of the MON pin threshold, the resistor tolerances, and the regulation range of the supply being monitored. Also, ensure that the voltage on the MON pin will not exceed 7V.The FUSEFLT pins are used to indicate the status of the input fuses. If one of the IN pins falls below VINx(TH), typi-cally 3.5V, the FUSEFLT pin corresponding to that supply will pull low. The IN pins each sink a minimum of 0.5mA, Table 1. Fault TableDVSD1 < DVSD(FLT)TrueTrueTrueTrueFalseFalseFalseFalseVIN1 > 3.5VTrueTrueFalseFalseTrueTrueFalseFalseVMON1 > 1.23VTrueFalseTrueFalseTrueFalseTrueFalse VDSFLT*Hi-ZHi-ZHi-ZHi-ZPulldownPulldownPulldownPulldown FUSEFLT1PWRFLT1Hi-ZHi-ZPulldownPulldownHi-ZHi-ZPulldownPulldownHi-ZPulldownHi-ZPulldownPulldownPulldownPulldownPulldown*DVSD2 < DVSD(FLT)enough to pull the pin low after an input fuse blows open. If there is a possibility that the MOSFET leakage current can be greater than 0.5mA, a resistor can be connected between the IN pin and GND to sink more current. Note that if the input supply voltage is less than VINx(TH) the FUSEFLT pin will pull low.4355faLTC4355applicaTions inForMaTionSystem Power Supply FailureThe LTC4355 automatically supplies load current from the system input supply with the higher voltage. If this supply shorts to ground, reverse current begins to flow through the pass transistor temporarily and the transis-tor begins to turn off. When this reverse current creates –25mV of voltage drop across the drain and source pins of the pass transistor, a fast pulldown circuit engages to drive the gate low faster.The remaining system power supply delivers the load cur-rent through the body diode of its pass transistor until the channel turns on. The LTC4355 ramps the gate up with 20µA, turning on the N-channel MOSFET to reduce the voltage drop across it.When the capacitances at the inputs and output are very small, large changes in current can cause inductive tran-sients that exceed the 100V Absolute Maximum Ratings of the pins. A surge suppressor (TransZorb) at the output will minimize this ringing.Loop StabilityThe servo loop is compensated by the parasitic capaci- tance of the power N-channel MOSFET. No further com-pensation components are normally required. In the case when a MOSFET with less than 1000pF gate capacitance is chosen, a 1000pF compensation capacitor connected across the gate and source pins might be required. Design ExampleThe following design example demonstrates the calcula-tions involved for selecting components in a 36V to 72V system with 5A maximum load current (see Figure 1).First, choose the N-channel MOSFET. The 100V, FDS3672 in the SO-8 package with RDS(ON) = 22mW(max) offers a good solution. The maximum voltage drop across it is:DV = 5A • 22mW = 110mVThe maximum power dissipation in the MOSFET is a mere: P = 5A • 110mV = 0.55WNext, select the resistive dividers that guarantee the PWRFLT pins willl not assert when the input supplies are above 36V. The maximum VMONx(TH) is 1.245V and the maximum IMONx(IN) is 1µA. Choose a 1% tolerance resistor R1 = 12.7kW. Then,IR2=+IMONx(TH)(MAX)R1(MIN)1.245V=+1µA=100µA12.7kW(−1%)VMONx(TH)Use IR2 to choose R2. R2=36V−1.245V=348kW100µAVIN1 = +48VVIN2 = +48VR2340kF17AF27AR4340kM1FDS3672M2FDS3672R533kIN1MON1SETMON2LTC4355GNDGATE1IN2GATE2OUTVDSFLTFUSEFLT1FUSEFLT2PWRFLT1PWRFLT2 GREEN LEDsPANASONIC LN1351CD1D2R633kR733kR833kR933kTOLOADR112.7kGNDR312.7kD3D44355 F01D5Figure 1. 36V to 72V/5A Design Example4355faLTC4355applicaTions inForMaTionAdjust R2 down by 1% to 344kW to account for its tolerance. The next lower standard resistor value is R2 = 340kW.The LED D1, a Panasonic Green LN1351C, requires at least 1mA of current to fully turn on. Therefore, R5 is set to 33kW to accommodate the lowest input supply voltage of 36V.Layout ConsiderationsThe following advice should be considered when laying out a printed circuit board for the LTC4355.The inputs to the servo amplifiers, IN1, IN2, and OUT should be connected as closely as possible to the MOSFETs’ terminals for good accuracy.Keep the traces to the MOSFETs wide and short. The PCB traces associated with the power path through the MOS-FETs should have low resistance (see Figure 2).For the DFN package, pin spacing may be a concern at voltages greater then 30V. Check creepage and clearance guidelines to determine if this is an issue. Use no-clean solder to minimize PCB contamination.SSSGFETDDDDDDDDFETGSSSFigure 2. Layout Considerations4355 F02 IN2GATE2LTC4355 OUT GATE1IN14355fa0LTC4355applicaTions inForMaTionRTNARTNB340k10A10AIRF3710IRF371033k33k33k33k33k340kIN1MON1SETMON2GATE1IN2GATE2OUTVDSFLTFUSEFLT1FUSEFLT2PWRFLT1PWRFLT2LTC4355GND12.7k12.7k GREEN LEDsPANASONIC LN1351CLOAD12k33kVCCLTC4354DA2kDB2kIRF3710IRF37104355 F03FAULTGBVSS1µF RED LEDPANASONICLN1251CLAGAVA = –48VVB = –48V15A15AFigure 3. –36V to –72V/10A with Positive Supply and Negative Supply Diode-ORing4355faLTC4355applicaTions inForMaTionVA = 48V10AIRLR3110ZPbF12V ZENERCM4Z669-LTCVB = 48V10AIRLR3110ZPbF33k12V ZENERCM4Z669-LTC340k340kIN1MON1SETMON2GATE1IN2LTC4355GNDGATE2OUTVDSFLTFUSEFLT1FUSEFLT2PWRFLT1PWRFLT212.7k12.7k GREEN LEDsPANASONIC LN1351CLOAD12kVCCLTC4354FAULTGBVSS1µFDA2kDB2kGAGNDAGNDB15A15AIRLR3110ZPbFIRLR3110ZPbF4355 F04Figure 4. 36V to 72V/10A with Positive Supply and Negative Supply Diode-ORing, Combined Fault Outputs, and Zener Clamps on MOSFET Gates4355faLTC4355Typical applicaTionsSingle 12V/15A Ideal Diode with Parallel DriversF115AM1HAT2165HVIN = 12VTO LOADR310kR410kR510kR186.6kIN1MON1SETR212.7kMON2LTC4355GNDIN2GATE1GATE2OUTVDSFLTFUSEFLT1PWRFLT1FUSEFLT2PWRFLT2D1D2GREEN LEDsD3PANASONIC LN1351CGND4355 TA03Single 36V to 72V/30A Ideal Diode Using Parallel MOSFETsF130AVIN = +48VM1IRFS4710M2IRFS4710TOLOADR333kR533kR433kR1340kIN1MON1SETR212.7kMON2LTC4355GNDIN2GATE1GATE2OUTVDSFLTFUSEFLT1PWRFLT1FUSEFLT2PWRFLT2D1D2GND4355 TA04D3 GREEN LEDsPANASONIC LN1351C4355faLTC4355Typical applicaTionsAdvancedTCA with High-Side and Low-Side Ideal Diode-ORand Hot Swap Controller with I2C Current and Voltage MonitorLONGVRTN_ALONGVRTN_B10AVDA–10AVDA–FDS367291Ω22nF100V–48VRTN(OUT)FDS3672SMBT70AIN1GATE1IN2GATE2OUTMON1SETMON2DENABLE_BSHORT100kDFMMT5401D100kFMMT5401D100kLTC4355CSGND1.1k1.1k1.1k1.1kENABLE_ASHORT1M100k1M1µF10k137k107kVCCLTC4354CS8DADBGA2k2kMEDIUM LONG–48V_A7AFDS3672GBVSSVSS100nFHZS5C1100nF100k100nF10.2k2.49k1µFUVHUVLADIN2OVONINTVCCFLTINENADR1ADR0SS100nF330nFVINLTC4261CGNPGSCLSDAISDAOALERTPGIOPGIADINGATEDRAINRAMP33nFTMRVEESENSE330nF47nF10Ω1M1k10nF100VMEDIUM SHORT–48V_B7AFDS3672D: 1N4148WS8mΩIRF1310NS–48VOUT4355 TA054355faLTC4355package DescripTionDE Package14-Lead Plastic DFN (4mm × 3mm)(Reference LTC DWG # 05-08-1708 Rev A)R = 0.115TYP0.40 ± 0.10144.00 ±0.10(2 SIDES)0.70 ±0.053.60 ±0.052.20 ±0.053.30 ±0.051.70 ± 0.05PACKAGEOUTLINE0.25 ± 0.050.50 BSC3.00 REFRECOMMENDED SOLDER PAD PITCH AND DIMENSIONSAPPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED0.00 – 0.05PIN 1TOP MARK(SEE NOTE 6)0.200 REFR = 0.05TYP3.00 ±0.10(2 SIDES)83.30 ±0.101.70 ± 0.10PIN 1 NOTCHR = 0.20 OR0.35 × 45°CHAMFER 10.25 ± 0.050.50 BSC3.00 REFBOTTOM VIEW—EXPOSED PAD(DE14) DFN 0806 REV B70.75 ±0.05NOTE:1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC PACKAGE OUTLINE MO-2292. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE5. EXPOSED PAD SHALL BE SOLDER PLATED6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGES Package16-Lead Plastic Small Outline (Narrow .150 Inch)(Reference LTC DWG # 05-08-1610).045 ±.005 161514.386 – .394(9.804 – 10.008)NOTE 3131211109.050 BSCN.245MINN.160 ±.005.228 – .244(5.791 – 6.197)123N/2N/2.150 – .157(3.810 – 3.988)NOTE 3.030 ±.005 TYPRECOMMENDED SOLDER PAD LAYOUT.010 – .020× 45°(0.254 – 0.508)1.053 – .069(1.346 – 1.752)2345678.008 – .010(0.203 – 0.254)0° – 8° TYP.004 – .010(0.101 – 0.254).016 – .050(0.406 – 1.270)NOTE:1. DIMENSIONS IN .014 – .019(0.355 – 0.483)TYP.050(1.270)BSCS16 0502INCHES(MILLIMETERS)2. DRAWING NOT TO SCALE3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006\" (0.15mm)4355faInformation furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.LTC4355Typical applicaTion200W AdvancedTCA Ideal Diode-ORRTNA10A10AFDS3672RTNBFDS3672IN1GATE1IN2GATE2OUTLTC4355GNDLOAD12kVCCLTC4354DA2kDB2kFDS3672FDS36724355 TA061µFGBVSSGAVA = –48VVB = –48V7A7ArelaTeD parTsPART NUMBERLT1640AH/LT1640ALLT1641-1/LT1641-2LTC1921LT4250LTC4251/LTC4251-1/ LTC4251-2LTC4252-1/LTC4252-2/ LTC4252-1A/LTC4252-2ALTC4253LT4256LTC4260LTC4261LTC4350LT4351LTC4354DESCRIPTIONNegative High Voltage Hot Swap™ Controllers in SO-8Positive High Voltage Hot Swap ControllersDual –48V Supply and Fuse Monitor–48V Hot Swap Controller–48V Hot Swap Controllers in SOT-23–48V Hot Swap Controllers in MS8/MS10–48V Hot Swap Controller with SequencerPositive 48V Hot Swap Controller with Open-Circuit DetectPositive High Voltage Hot Swap ControllerNegative High Voltage Hot Swap ControllerHot Swappable Load Share ControllerMOSFET Diode-OR ControllerNegative Voltage Diode-OR Controller and MonitorCOMMENTSNegative High Voltage Supplies From –10V to –80VActive Current Limiting, Supplies From 9V to 80VUV/OV Monitor, –10V to –80V Operation, MSOP PackageActive Current Limiting, Supplies From –20V to –80VFast Active Current Limiting, Supplies From –15VFast Active Current Limiting, Supplies From –15V, Drain Accelerated ResponseFast Active Current Limiting, Supplies From –15V, Drain Accelerated Response, Sequenced Power Good OutputsFoldback Current Limiting, Open-Circuit and Overcurrent Fault Output, Up to 80V SupplyWith I2C and ADC, Supplies from 8.5V to 80VWith I2C and 10-Bit ADC, Adjustable Inrush and Overcurrent LimitsOutput Voltage: 1.2V to 20V, Equal Load SharingExternal N-Channel MOSFETs Replace ORing Diodes, 1.2V to 20VControls Two N-Channel MOSFETs, 1µs Turn-Off, 80V OperationHot Swap is a trademark of Linear Technology Corporation.4355faLinear Technology Corporation(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.comLT 0907 REV A • PRINTED IN USA1630 McCarthy Blvd., Milpitas, CA 95035-7417 LINEAR TECHNOLOGY CORPORATION 2007