LT4356-1Overvoltage Protection Regulator and Inrush LimiterFEATURES
n n n n n n n n n n nDESCRIPTION
The LT®4356-1 surge stopper protects loads from high voltage transients. It regulates the output during an overvoltage event, such as load dump in automobiles, by controlling the gate of an external N-Channel MOSFET. The output is limited to a safe value thereby allowing the loads to continue functioning. The LT4356-1 also monitors the voltage drop between the VCC and SNS pins to protect against overcurrent faults. An internal amplifi er limits the current sense voltage to 50mV. In either fault condition, a timer is started inversely proportional to MOSFET stress. If the timer expires, the FLT pin pulls low to warn of an impending power down. If the condition persists, the MOSFET is turned off.The spare amplifi er may be used as a voltage detection comparator or as a linear regulator controller driving an external PNP pass transistor.Back-to-back FETs can be used in lieu of a Schottky diode for reverse input protection, reducing voltage drop and power loss. A shutdown pin reduces the quiescent current to less than 7μA during shutdown.Stops High Voltage SurgesAdjustable Output Clamp VoltageOvercurrent ProtectionWide Operation Range: 4V to 80VReverse Input Protection to –60VLow 7μA Shutdown CurrentAdjustable Fault TimerControls N-Channel MOSFETShutdown Pin Withstands –60V to 100VFault Output IndicationSpare Amplifi er for Level Detection Comparator or Linear Regulator Controllern Available in (4mm × 3mm) 12-Pin DFN or 10-Pin MSOP PackagesAPPLICATIONS
Automotive/Avionic Surge Protectionn Hot Swap/Live Insertionn High Side Switch for Battery Powered SystemsnL, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.All other trademarks are the property of their respective owners.TYPICAL APPLICATION
4A, 12V Overvoltage Output RegulatorVIN12V10mΩIRLR2908VOUTOvervoltage Protector Regulates Output at 27V During Transient80V INPUT SURGE10Ω383kVCCSHDNIN+100kENUNDERVOLTAGEAOUTGNDTMRFLT43561 TA01102kOUTFB4.99kVCCDC-DCCONVERTERSHDNGNDFAULTT
SNSGATEV
N
12VV12VLT4356DE-127V CLAMP0.1μF43561fd1
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LT4356-1ABSOLUTE MAXIMUM RATINGS
(Notes 1 and 2)VCC, SHDN ................................................–60V to 100VSNS ..............................VCC –30V or –60V to VCC + 0.3VOUT, AOUT, FLT, EN .....................................–0.3V to 80VGATE (Note 3) ................................–0.3V to VOUT + 10VFB, TMR, IN+ ................................................–0.3V to 6VAOUT, EN, FLT .........................................................–3mAOperating Temperature RangeLT4356C-1 ...............................................0°C to 70°CLT4356I-1 ............................................–40°C to 85°CLT4356H-1 .........................................–40°C to 125°CStorage Temperature RangeDE12 ..................................................–65°C to 125°CMS .....................................................–65°C to 150°CLead Temperature (Soldering, 10 sec, MS10) .......300°CPIN CONFIGURATION
TOP VIEW
TMRFBOUTGATESNSVCC
123456
13
12IN+11AOUT10GND987
ENFLTSHDN
TOP VIEW
FBOUTGATESNSVCC
12345
109876
TMRGNDENFLTSHDN
DE PACKAGE
12-LEAD (4mm s 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 43°C/WEXPOSED PAD (PIN 13) PCB GND CONNECTION OPTIONALMS PACKAGE
10-LEAD PLASTIC MSOPTJMAX = 125°C, θJA = 120°C/WORDER INFORMATION
LEAD FREE FINISHLT4356CDE-1#PBFLT4356IDE-1#PBFLT4356HDE-1#PBFLT4356CMS-1#PBFLT4356IMS-1#PBFLT4356HMS-1#PBFLEAD BASED FINISHLT4356CDE-1LT4356IDE-1LT4356HDE-1LT4356CMS-1LT4356IMS-1LT4356HMS-1TAPE AND REELLT4356CDE-1#TRPBFLT4356IDE-1#TRPBFLT4356HDE-1#TRPBFLT4356CMS-1#TRPBFLT4356IMS-1#TRPBFLT4356HMS-1#TRPBFTAPE AND REELLT4356CDE-1#TRLT4356IDE-1#TRLT4356HDE-1#TRLT4356CMS-1#TRLT4356IMS-1#TRLT4356HMS-1#TRPART MARKING*435614356143561LTCNSLTCNSLTCNSPART MARKING*435614356143561LTCNSLTCNSLTCNSPACKAGE DESCRIPTION12-Lead (4mm × 3mm) Plastic DFN12-Lead (4mm × 3mm) Plastic DFN12-Lead (4mm × 3mm) Plastic DFN10-Lead Plastic MSOP10-Lead Plastic MSOP10-Lead Plastic MSOPPACKAGE DESCRIPTION12-Lead (4mm × 3mm) Plastic DFN12-Lead (4mm × 3mm) Plastic DFN12-Lead (4mm × 3mm) Plastic DFN10-Lead Plastic MSOP10-Lead Plastic MSOP10-Lead Plastic MSOPTEMPERATURE RANGE0°C to 70°C–40°C to 85°C–40°C to 125°C0°C to 70°C–40°C to 85°C–40°C to 125°CTEMPERATURE RANGE0°C to 70°C–40°C to 85°C–40°C to 125°C0°C to 70°C–40°C to 85°C–40°C to 125°CConsult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/43561fd2
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LT4356-1ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. VCC = 12V unless otherwise noted.PARAMETEROperating Voltage RangeVCC Supply CurrentCONDITIONSlVSHDN = FLOATVSHDN = 0VLT4356I-1, LT4356C-1LT4356H-1VSNS = VCC = –30V, SHDN OpenVSNS = VCC = VSHDN = –30VVCC = 4V; (VGATE – VOUT)48V ≥ VCC ≥ 8V; (VGATE – VOUT)VGATE = 12V; VCC = 12VVGATE = 48V; VCC = 48VOvervoltage, VFB = 1.4V, VGATE = 12VOvercurrent, VCC – VSNS = 120mV, VGATE = 12VShutdown Mode, VSHDN = 0V, VGATE = 12VVGATE = 12V; VOUT = 12V, LT4356I-1, LT4356C-1VGATE = 12V; VOUT = 12V, LT4356H-1VFB = 1.25VΔVSNS = (VCC – VSNS), VCC = 12V, LT4356I-1, LT4356C-1ΔVSNS = (VCC – VSNS), VCC = 12V, LT4356H-1ΔVSNS = (VCC – VSNS), VCC = 48V, LT4356I-1, LT4356C-1ΔVSNS = (VCC – VSNS), VCC = 48V, LT4356H-1VSNS = VCC = 12V to 48VFLT, EN = 80VAOUT = 80VVTMR = 1V, VFB = 1.5V, (VCC – VOUT) = 0.5VVTMR = 1V, VFB = 1.5V, (VCC – VOUT) = 75VVTMR = 1.3V, VFB = 1.5VVTMR = 1V, ΔVSNS = 60mV, (VCC – VOUT) = 0.5VVTMR = 1V, ΔVSNS = 60mV, (VCC – VOUT) = 80VVTMR = 1V, VFB = 1V, ΔVSNS = 0VFLT From High to Low, VCC = 5V to 80VVGATE From Low to High, VCC = 5V to 80VFrom FLT going Low to GATE going Low, VCC = 5V to 80VVIN+ = 1.25VISINK = 2mAISINK = 0.1mAVOUT = VCC = 12VVOUT = VCC = 12V, VSHDN = 0VΔVOUT = VCC – VOUT; EN From Low to HighVCC = 12V to 48VVCC = 12V to 48VVSHDN = 0VGATE From High to Low, ΔVSNS = 0 → 120mVGATE From High to Low, VFB = 0 → 1.5Vllllllllllllllllllllllllllllllllllllllllll–10.250.60.4–1.5–44–3.5–2.5–1951.71.220.48801.22–2.5–50–5.5–4.5–2602.21.250.51001.250.3230020060.51.41.7–420.254542.5464354.510–4–4.57551.51.2251.215–23–301501051.251.250.350505151101.2751.275155555656222.54.5–4–55–8–6.5–3152.71.280.521201.2818800300120.71.72.12.2–841SYMBOLVCCICCMIN4TYP17770.30.8MAX801.525304012818–36–50UNITSVmAμAμAμAmAmAVVμAμAmAmAmAVVμAmVmVmVmVμAμAμAμAμAμAμAμAμAVVmVVμAVmVμAmAVVVVμAμsμsIRΔVGATEIGATE,UPIGATE,DNVFBIFBΔVSNSReverse Input CurrentGATE Pin Output High VoltageGATE Pin Pull-Up CurrentGATE Pin Pull-Down CurrentFB Pin Servo VoltageFB Pin Input CurrentOvercurrent Fault ThresholdISNSILEAKITMRSNS Pin Input CurrentFLT, EN Pins Leakage CurrentAOUT Pin Leakage CurrentTMR Pin Pull-up CurrentTMR Pin Pull-down CurrentVTMRΔVTMRVIN+IIN+VOLIOUTΔVOUTVSHDNTMR Pin ThresholdsEarly Warning PeriodIN+ Pin ThresholdIN+ Pin Input CurrentFLT, EN, AOUT Pins Output LowOUT Pin Input CurrentOUT Pin High ThresholdSHDN Pin ThresholdVSHDN(FLT)SHDN Pin Float VoltageISHDNtOFF(OC)tOFF(OV)SHDN Pin CurrentOvercurrent Turn Off Delay TimeOvervoltage Turn Off Delay TimeNote 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to GND unless otherwise specifi ed.Note 3: An internal clamp limits the GATE pin to a minimum of 10V above the OUT pin. Driving this pin to voltages beyond the clamp may damage the device.43561fd3
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LT4356-1TYPICAL PERFORMANCE CHARACTERISTICS
ICC (Shutdown) vs VCC605040ICC (μA)3020100
200ICC (μA)ICC (μA)6001000
Specifi cations are at VCC = 12V, TA = 25°C unless otherwise noted.ICC vs VCC35302520151050–50
ICC (Shutdown) vs Temperature800
400
0102030
4050VCC (V)
607080
0
0102030
43561 G01
4050VCC (V)
607080–25
2575050
TEMPERATURE (°C)
100125
43561 G0243561 G19
Reverse Current vs Reverse Voltage–20
VCC = SNS65
–15
4ISHDN (μA)–10
32
–5
1
0
SHDN Current vs TemperatureVSHDN = 0V403530IGATE (μA)–25
2575050
TEMPERATURE (°C)
100
125
2520151050
GATE Pull-Up Current vs VCCICC (mA)0–20–40VCC (V)
–60–80
43561 G03
0–50
0102030
43561 G04
4050VCC (V)
607080
43561 G05
GATE Pull-Up Current vs Temperature3530
IGATE(DOWN) (mA)25IGATE (μA)20151050–50
VGATE = VOUT = 12V220200180160140120
GATE Pull-Down Current vs TemperatureOVERVOLTAGE CONDITIONVFB = 1.5V1210IGATE(DOWN) (mA)8642
GATE Pull-Down Current vs TemperatureOVERCURRENT CONDITIONΔVSNS = 120mV–25
0502575TEMPERATURE (°C)
100125
100–50
–25
2575050
TEMPERATURE (°C)
100125
0–50
–25
43561 G06
2575050
TEMPERATURE (°C)
100125
43561 G0743561 G08
43561fd4
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LT4356-1TYPICAL PERFORMANCE CHARACTERISTICS
ΔVGATE vs IGATE141210ΔVGATE (V)ΔVGATE (V)86420
VOUT = 12V141210
ΔVGATE (V)8642
0
2
4
6
108
IGATE (μA)
12
14
16
0–50
VCC = 4V Specifi cations are at VCC = 12V, TA = 25°C unless otherwise noted.ΔVGATE vs TemperatureIGATE = –1μAVCC = 8V14121086420
IGATE = –1μAVOUT = VCC0
10
20
30
4050VCC (V)
60
70
80
TA = 0°CTA = –40°CΔVGATE vs VCCTA = 25°C–25
0502575TEMPERATURE (°C)
100125
43561 G094356 G1043561 G11
Overvoltage TMR Current vs (VCC – VOUT)48
OVERVOLTAGE CONDITIONVOUT = 5V40VTMR = 1V32ITMR (μA)ITMR (μA)241680
280
Overcurrent TMR Current vs (VCC – VOUT)OVERCURRENT CONDITIONVOUT = 0V240VTMR = 1V20016012080400
ITMR (μA)0
10
20
304050VCC – VOUT (V)
60
70
80
14
Warning Period TMR Current vs VCCOVERVOLTAGE, EARLYWARNING PERIOD12VFB = 1.5VVTMR = 1.3V1086420
01020
304050VCC – VOUT (V)
6070800102030
43561 G1243561 G13
4050VCC (V)
607080
43561 G14
TMR Pull-Down Current vs Temperature3.02.52.0ITMR (μA)1.51.00.50–50
VOL (V)VTMR = 1V4.03.53.02.52.01.51.00.5
–25
0255075TEMPERATURE (°C)
100
125
0
Output Low Voltage vs CurrentAOUTFLTEN00.5
43561 G15
2.01.01.5
CURRENT (mA)
2.53.0
43561 G16
43561fd5
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LT4356-1TYPICAL PERFORMANCE CHARACTERISTICS Specifi cations are at VCC = 12V, TA = 25°C unless otherwise noted.Overvoltage Turn-Off Time vs Temperature500
OVERVOLTAGE CONDITIONVFB = 1.5V4.03.53.0
tOFF (ns)tOFF (μs)300
2.52.0
100
1.51.0–50
Overcurrent Turn-Off Time vs TemperatureOVERCURRENT CONDITIONΔVSNS = 120mV400
200
0–50
–25
0255075TEMPERATURE (°C)
100125–25
0255075TEMPERATURE (°C)
100125
43561 G1743561 G18
PIN FUNCTIONS
(DE/MS)AOUT (Pin 11 DE Only): Amplifi er Output. Open collector output of the auxiliary amplifi er. It is capable of sinking up to 2mA from 80V. The negative input of the amplifi er is internally connected to a 1.25V reference.EN (Pin 9/Pin 8): Open-Collector Enable Output. The EN pin goes high impedance when the voltage at the OUT pin is above (VCC – 0.7V), indicating the external MOSFET is fully on. The state of the pin is latched until the OUT pin voltage resets at below 0.5V and goes back up above 2V. The internal NPN is capable of sinking up to 3mA of cur-rent from 80V to drive an LED or opto-coupler.Exposed Pad (Pin 13 DE Only): Exposed pad may be left open or connected to device ground (GND).FB (Pin 2/Pin 1): Voltage Regulator Feedback Input. Con-nect this pin to the center tap of the output resistive divider connected between the OUT pin and ground. During an overvoltage condition, the GATE pin is servoed to main-tain a 1.25V threshold at the FB pin. This pin is clamped internally to 7V. Tie to GND to disable the OV clamp.FLT (Pin 8/Pin 7): Open-Collector Fault Output. This pin pulls low after the voltage at the TMR pin has reached the fault threshold of 1.25V. It indicates the pass transis-tor is about to turn off because either the supply voltage has stayed at an elevated level for an extended period of time (voltage fault) or the device is in an overcurrent condition (current fault). The internal NPN is capable of sinking up to 3mA of current from 80V to drive an LED or opto-coupler.GATE (Pin 4/Pin 3): N-Channel MOSFET Gate Drive Output. The GATE pin is pulled up by an internal charge pump current source and clamped to 14V above the OUT pin. Both voltage and current amplifi ers control the GATE pin to regulate the output voltage and limit the current through the MOSFET.GND (Pin 10/Pin 9): Device Ground.IN+ (Pin 12 DE Only): Positive Input of the Auxiliary Amplifi er. This amplifi er can be used as a level detection comparator with external hysteresis or linear regulator controlling an external PNP transistor. This pin is clamped internally to 7V. Connect to ground if unused.OUT (Pin 3/Pin 2): Output Voltage Sense Input. This pin senses the voltage at the source of the N-channel MOSFET and sets the fault timer current. When the OUT pin volt-age reaches 0.7V away from VCC, the EN pin goes high impedance.SHDN (Pin 7/Pin 6): Shutdown Control Input. The LT4356-1 can be shutdown to a low current mode by pulling the SHDN pin below the shutdown threshold of 0.6V. Pull this pin above 1.7V or disconnect it and allow the inter-43561fd6
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LT4356-1nal current source to turn the part back on. The leakage current to ground at the pin should be limited to no more than 1μA if no pull up device is used to turn the part on. The SHDN pin can be pulled up to 100V or below GND by 60V without damage.SNS (Pin 5/Pin 4): Current Sense Input. Connect this pin to the output of the current sense resistor. The current limit circuit controls the GATE pin to limit the sense voltage between VCC and SNS pins to 50mV. At the same time the sense amplifi er also starts a current source to charge up the TMR pin. This pin can be pulled below GND by up to 60V, though the voltage difference with the VCC pin must be limited to less than 30V. Connect to VCC if unused.TMR (Pin 1/Pin 10): Fault Timer Input. Connect a ca-pacitor between this pin and ground to set the times for early warning, fault and cool down periods. The current charging up this pin during fault conditions depends on the voltage difference between the VCC and OUT pins. When VTMR reaches 1.25V, the FLT pin pulls low to in-dicate the detection of a fault condition. If the condition persists, the pass transistor turns off when VTMR reaches the threshold of 1.35V. The pull up current stops and a 2μA current source starts to pull the TMR pin down as soon as the fault condition disappears. When VTMR reaches the retry threshold of 0.5V, the GATE pin pulls high turning back on the pass transistor.VCC (Pin 6/Pin 5): Positive Supply Voltage Input. The positive supply input ranges from 4V to 80V for normal operation. It can also be pulled below ground potential by up to 60V during a reverse battery condition, without damaging the part. The supply current is reduced to 7μA with all the functional blocks off.BLOCK DIAGRAM
VCCSNSGATEOUT50mV+–+IACHARGEPUMP14VFBVA–SHDNFLTAOUTOC1.25VAUXILLARYAMPLIFIERSHDNRESTARTOUTCONTROLLOGICGATEOFFFLTOVENIN+1.35VVCC0.5VITMR–++2μA1.25VTMR–GND43561 BD+–+–1.25V43561fd–+7
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LT4356-1OPERATION
Some power systems must cope with high voltage surges of short duration such as those in automobiles. Load circuitry must be protected from these transients, yet high availability systems must continue operating during these events.The LT4356-1 is an overvoltage protection regulator that drives an external N-channel MOSFET as the pass transis-tor. It operates from a wide supply voltage range of 4V to 80V. It can also be pulled below ground potential by up to 60V without damage. The low power supply require-ment of 4V allows it to operate even during cold cranking conditions in automotive applications. The internal charge pump turns on the N-channel MOSFET to supply current to the loads with very little power loss. Two MOSFETs can be connected back to back to replace an inline Schottky diode for reverse input protection. This improves the ef-fi ciency and increases the available supply voltage level to the load circuitry during cold crank.Normally, the pass transistor is fully on, powering the loads with very little voltage drop. When the supply volt-age surges too high, the voltage amplifi er (VA) controls the gate of the MOSFET and regulates the voltage at the source pin to a level that is set by the external resistor divider from the OUT pin to ground and the internal 1.25V reference. A current source starts charging up the capaci-tor connected at the TMR pin to ground. If the voltage at the TMR pin, VTMR, reaches 1.25V, the FLT pin pulls low to indicate impending turn-off due to the overvoltage condition. The pass transistor stays on until the TMR pin reaches 1.35V, at which point the GATE pin pulls low turning off the MOSFET.The potential at the TMR pin starts decreasing as soon as the overvoltage condition disappears. When the voltage at the TMR pin reaches 0.5V the GATE pin begins rising, turning on the MOSFET. The FLT pin will then go to a high impedance state.The fault timer allows the loads to continue functioning during short transient events while protecting the MOSFET from being damaged by a long period of supply overvoltage, such as a load dump in automobiles. The timer period var-ies with the voltage across the MOSFET. A higher voltage corresponds to a shorter fault timer period, ensuring the MOSFET operates within its safe operating area (SOA).The LT4356-1 senses an overcurrent condition by monitor-ing the voltage across an optional sense resistor placed between the VCC and SNS pins. An active current limit circuit (IA) controls the GATE pin to limit the sense volt-age to 50mV. A current is also generated to start charging up the TMR pin. This current is about 5 times the current generated during an overvoltage event. The FLT pin pulls low when the voltage at the TMR pin reaches 1.25V and the MOSFET is turned off when it reaches 1.35V.A spare amplifi er (SA) is provided with the negative input connected to an internal 1.25V reference. The output pull down device is capable of sinking up to 2mA of current allowing it to drive an LED or opto coupler. This amplifi er can be confi gured as a linear regulator controller driving an external PNP transistor or a comparator function to monitor voltages.A shutdown pin turns off the pass transistor and reduces the supply current to less than 7μA.43561fd8
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LT4356-1APPLICATIONS INFORMATION
The LT4356-1 can limit the voltage and current to the load circuitry during supply transients or overcurrent events. The total fault timer period should be set to ride through short overvoltage transients while not causing damage to the pass transistor. The selection of this N-channel MOSFET pass transistor is critical for this application. It must stay on and provide a low impedance path from the input supply to the load during normal operation and then dissipate power during overvoltage or overcurrent conditions.The following sections describe the overcurrent and the overvoltage faults, and the selection of the timer capacitor value based on the required warning time. The selection of the N-channel MOSFET pass transistor is discussed next. Auxiliary amplifi er, reverse input, and the shutdown functions are covered after the MOSFET selection. External component selection is discussed in detail in the Design Example section.Overvoltage FaultThe LTC4356-1 limits the voltage at the OUT pin during an overvoltage situation. An internal voltage amplifi er regu-lates the GATE pin voltage to maintain a 1.25V threshold at the FB pin. During this period of time, the power MOSFET is still on and continues to supply current to the load. This allows uninterrupted operation during short overvoltage transient events.When the voltage regulation loop is engaged for longer than the time-out period, set by the timer capacitor con-nected from the TMR pin to ground, an overvoltage fault is detected. The GATE pin is pulled down to the OUT pin by a 150mA current. After the fault condition has disappeared and a cool down period has transpired, the GATE pin starts to pull high again. This prevents the power MOSFET from being damaged during a long period of overvoltage, such as during load dump in automobiles.Overcurrent FaultThe LT4356-1 features an adjustable current limit that protects against short circuits or excessive load current. During an overcurrent event, the GATE pin is regulated to limit the current sense voltage across the VCC and SNS pins to 50mV.An overcurrent fault occurs when the current limit circuitry has been engaged for longer than the time-out delay set by the timer capacitor. The GATE pin is then immediately pulled low by a 10mA current to GND turning off the MOSFET. After the fault condition has disappeared and a cool down period has transpired, the GATE pin is allowed to pull back up and turn on the pass transistor.Fault TimerThe LT4356-1 includes an adjustable fault timer pin. Con-necting a capacitor from the TMR pin to ground sets the delay timer period before the MOSFET is turned off. The same capacitor also sets the cool down period before the MOSFET is allowed to turn back on after the fault condition has disappeared.Once a fault condition, either overvoltage or overcurrent, is detected, a current source charges up the TMR pin. The current level varies depending on the voltage drop across the drain and source terminals of the power MOSFET(VDS), which is typically from the VCC pin to the OUT pin. This scheme takes better advantage of the avail-able Safe Operating Area (SOA) of the MOSFET than would a fi xed timer current. The timer function operates down to VCC = 5V across the whole temperature range.Fault Timer CurrentThe timer current starts at around 2μA with 0.5V or less of VDS, increasing linearly to 50μA with 75V of VDS dur-ing an overvoltage fault (Figure 1). During an overcurrent fault, it starts at 4μA with 0.5V or less of VDS but increases to 260μA with 80V across the MOSFET (Figure 2). This arrangement allows the pass transistor to turn off faster during an overcurrent event, since more power is dissipated during this condition. Refer to the Typical Performance Characteristics section for the timer current at different VDS in both overvoltage and overcurrent events.When the voltage at the TMR pin, VTMR, reaches the 1.25V threshold, the FLT pin pulls low to indicate the detection of a fault condition and provide warning to the load of the impending power loss. In the case of an overvoltage fault, the timer current then switches to a fi xed 5μA. 43561fd9
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LT4356-1APPLICATIONS INFORMATION
VTMR(V)1.351.25VDS = 75V(ITMR = 50μA)VDS = 10V(ITMR = 8μA)ITMR = 5μAITMR = 5μAMOSFET. The TMR pin is then actively regulated to 0.5V until the next fault condition appears. The total cool down timer period is given by: TIMEtCOOL =
CTMR • 0.85V
2µA
MOSFET Selection0.50tFLT= 15ms/μFtWARNING= 20ms/μFtFLT = 93.75ms/μFTOTAL FAULT TIMER = tFLT + tWARNING
tWARNING= 20ms/μF43561 F01
Figure 1. Overvoltage Fault Timer CurrentVTMR(V)1.351.25VDS = 80V(ITMR = 260μA)VDS = 10V(ITMR = 35μA)The LT4356-1 drives an N-channel MOSFET to conduct the load current. The important features of the MOSFET are on-resistance RDS(ON), the maximum drain-source voltage V(BR)DSS, the threshold voltage, and the SOA.The maximum allowable drain-source voltage must be higher than the supply voltage. If the output is shorted to ground or during an overvoltage event, the full supply voltage will appear across the MOSFET.The gate drive for the MOSFET is guaranteed to be more than 10V and less than 18V for those applications with VCC higher than 8V. This allows the use of standard threshold voltage N-channel MOSFETs. For systems with VCC less than 8V, a logic level MOSFET is required since the gate drive can be as low as 4.5V.The SOA of the MOSFET must encompass all fault condi-tions. In normal operation the pass transistor is fully on, dissipating very little power. But during either overvoltage or overcurrent faults, the GATE pin is servoed to regu-late either the output voltage or the current through the MOSFET. Large current and high voltage drop across the MOSFET can coexist in these cases. The SOA curves of the MOSFET must be considered carefully along with the selection of the fault timer capacitor.Transient Stress in the MOSFETDuring an overvoltage event, the LT4356-1 drives a series pass MOSFET to regulate the output voltage at an acceptable level. The load circuitry may continue operating throughout this interval, but only at the expense of dissipation in the MOSFET pass device. MOSFET dissipation or stress is a function of the input voltage waveform, regulation voltage and load current. The MOSFET must be sized to survive this stress.Most transient event specifi cations use the model shown in Figure 3. The idealized waveform comprises a linear 43561fd0.50tFLT= 2.88ms/μFtWARNING= 0.38ms/μFtFLT = 21.43ms/μFTIMETOTAL FAULT TIMER = tFLT + tWARNING
tWARNING= 2.86ms/μF
43561 F02
Figure 2. Overcurrent Fault Timer CurrentThe interval between FLT asserting low and the MOSFET turning off is given by: tWARNING =
CTMR • 100mV
5µA
This fi xed early warning period allows the systems to per-form necessary backup or house keeping functions before the power supply is cut off. After VTMR crosses the 1.35V threshold, the pass transistor turns off immediately. Note that during an overcurrent event, the timer current is not reduced to 5μA after VTMR has reached 1.25V threshold, since it would lengthen the overall fault timer period and cause more stress on the power MOSFET.As soon as the fault condition has disappeared, a 2μA current starts to discharge the timer capacitor to ground. When VTMR reaches the 0.5V threshold, the internal charge pump starts to pull the GATE pin high, turning on the 10
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LT4356-1APPLICATIONS INFORMATION
VPKTVPKTVREGVINtrVIN
tr43561 F04
43561 F03Figure 3. Prototypical Transient WaveformFigure 4. Safe Operating Area Required to Survive Prototypical Transient Waveformramp of rise time tr, reaching a peak voltage of VPK and exponentially decaying back to VIN with a time constant of t. A common automotive transient specifi cation has constants of tr = 10μs, VPK = 80V and τ = 1ms. A surge condition known as “load dump” has constants of tr = 5ms, VPK = 60V and τ = 200ms.MOSFET stress is the result of power dissipated within the device. For long duration surges of 100ms or more, stress is increasingly dominated by heat transfer; this is a matter of device packaging and mounting, and heatsink thermal mass. For short duration transients of less than 100ms, MOSFET survival is increasingly a matter of safe operating area (SOA), an intrinsic property of the MOSFET.SOA quantifi es the time required at any given condition of VDS and ID to raise the junction temperature of the MOSFET to its rated maximum. MOSFET SOA is expressed gure is es-in units of watt-squared-seconds (P2t). This fisentially constant for intervals of less than 100ms for any given device type, and rises to infi nity under DC operating conditions. Destruction mechanisms other than bulk die temperature distort the lines of an accurately drawn SOA graph so that P2t is not the same for all combinations of ID and VDS. In particular P2t tends to degrade as VDS ap-proaches the maximum rating, rendering some devices useless for absorbing energy above a certain voltage.Calculating Transient StressTo select a MOSFET suitable for any given application, the SOA stress must be calculated for each input transient which shall not interrupt operation. It is then a simple mat-ter to chose a device which has adequate SOA to survive the maximum calculated stress. P2t for a prototypical transient waveform is calculated as follows (Figure 4).Let a = VREG – VIN b = VPK – VIN (VIN = Nominal Input Voltage)Then1(b–a)3
tr+
bP2t = ILOAD23
12b22
2aln+3a+b4ab
a2
Typically VREG ≈ VIN and τ >> tr simplyfying the above to12
P2t = ILOAD2(VPK–VREG)τ
2
(W2s)
For the transient conditions of VPK = 80V, VIN = 12V, VREG = 16V, tr = 10μs and τ = 1ms, and a load current of 3A, P2t is 16.7W2s—easily handled by a MOSFET in a D-pak package. The P2t of other transient waveshapes is evaluated by integrating the square of MOSFET power versus time.Calculating Short Circuit StressSOA stress must also be calculated for short circuit condi-tions. Short circuit P2t is given by: P2t=(VIN•ΔVSNS/RSNS)2•tTMR(W2s)
where, ΔVSNS is the SENSE pin threshold, and tTMR is the overcurrent timer interval.For VIN = 14.7V, VSNS = 50mV, RSNS = 12mΩ and CTMR = 100nF, P2t is 6.6W2s—less than the transient SOA calculated in the previous example. Nevertheless, to ac-43561fd11
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LT4356-1APPLICATIONS INFORMATION
count for circuit tolerances this fi gure should be doubled 2to 13.2Ws.Limiting Inrush Current and GATE Pin CompensationThe LT4356-1 limits the inrush current to any load capaci-tance by controlling the GATE pin voltage slew rate. An external capacitor can be connected from GATE to ground to slow down the inrush current further at the expense of slower turn-off time.The LTC4356-1 does not need extra compensation compo-nents at the GATE pin for stability during an overvoltage or overcurrent event. However, with fast, high voltage transient steps at the input, a gate capacitor, C1, to ground is needed to prevent turn-on of the N-Channel MOSFET.The extra gate capacitance slows down the turn off time during fault conditions and may allow excessive current during an output short event. An extra resistor, R1, in series with the gate capacitor can improve the turn off time. A diode, D1, should be placed across R1 with the cathode connected to C1 as shown in Figure 5.Auxiliary Amplifi erAn uncommitted amplifi er is included in the LT4356-1 to provide fl exibility in the system design. With the negative input connected internally to the 1.25V reference, the am-plifi er can be connected as a level detect comparator with external hysteresis. The open collector output pin, AOUT, is capable of driving an opto or LED. It can also interface with the system via a pull-up resistor to a supply voltage up to 80V.Q1D1IN4148WR3R1C1GATELT4356-143561 F05The amplifi er can also be confi gured as a low dropout linear regulator controller. With an external PNP transistor, such as 2N2905A, it can supply up to 100mA of current with only a few hundred mV of dropout voltage. Current limit can be easily included by adding two diodes and one resistor (Figure 6).*4.7Ω2N2905A ORBCP53INPUTOUTPUTR6100kD1*BAV9911AOUTLT4356DE-1* OPTIONAL FOR CURRENT LIMIT
43561 F06Figure 6. Auxiliary LDO Output with Optional Current LimitReverse Input ProtectionA blocking diode is commonly employed when reverse input potential is possible, such as in automotive applica-tions. This diode causes extra power loss, generates heat, and reduces the available supply voltage range. During cold crank, the extra voltage drop across the diode is particularly undesirable.The LT4356-1 is designed to withstand reverse voltage without damage to itself or the load. The VCC, SNS, and SHDN pins can withstand up to 60V of DC voltage below the GND potential. Back-to-back MOSFETs must be used to eliminate the current path through their body diodes (Figure 7). Figure 8 shows the approach with a P-Channel MOSFET in place of Q2.ShutdownThe LT4356-1 can be shut down to a low current mode when the voltage at the SHDN pin goes below the shutdown threshold of 0.6V. The quiescent current drops to 7μA.The SHDN pin can be pulled up to VCC or below GND by up to 60V without damaging the pin. Leaving the pin open allows an internal current source to pull it up and turn on the part while clamping the pin to 2.5V. The leakage cur-rent at the pin should be limited to no more than 1μA if no pull up device is used to help turn it on.43561fdFigure 512
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LT4356-1APPLICATIONS INFORMATION
VIN12VD2*SMAJ58CARSNS10mΩQ2IRLR2908Q1IRLR2908Q32N3904R4R510Ω1MR310ΩVOUT12V, 3ACLAMPEDAT 16VD11N41485SNSVCCR159kR710k4GATE3OUTFBpower trace parasitic inductance should be minimized by using wide traces. A snubber circuit dampens the ringing associated with voltage spikes. A 10Ω resistor in series with a 0.1μF capacitor between VCC and GND is effective with up to 1μH feed point inductance. A surge suppressor, D2, in Figure 9, at the input will clamp the voltage spikes.A 1μF ceramic capacitor, CL, is needed at the OUT pin to clamp the voltage spike if the input voltage rise time is 6C20.1μFR610Ω711122R24.99kLT4356DE-1SHDNAOUTIN+GND10TMR1CTMR0.1μFR4383kR5100kVOUT12V, 3ACLAMPED AT 16VUNDERVOLTAGE11AOUTVINC20.1μF100VRSNS10mΩQ1IRLR2908FLTEN43561 F0789D2SMAJ58AR610Ω*DIODES INC.6712Figure 7. Overvoltage Regulator with N-Channel MOSFET Reverse Input ProtectionRSNS10mΩQ2Si4435D11N524515VR610k5SNS6C20.1μF71112VCCR310Ω4GATE3OUTFB2R24.99kLT4356DE-1SHDNAOUTIN+GND10*DIODES INC.TMR1CTMR0.1μFFLTEN43561 F08VCCSHDNIN+R310Ω543SNSGATEOUTFB2R159kCL1μFCERAMICLT4356DE-1ENGND10TMR1FLT43561 F09R24.99k98FAULTVCCDC-DCCONVERTERSHDNGNDVIN12VD2*SMAJ58CAQ1IRLR2908R159kCTMR47nFFigure 9. Overvoltage Regulator with Low Battery Detectionfaster than 10μs. A total bulk capacitance in the range of 22μF is also required close to the VCC pin of the DC/DC converter, if not already provided by the converter.Layout ConsiderationsTo achieve accurate current sensing, Kelvin connection to the current sense resistor (RSNS in Figure 9) is recom-mended. The minimum trace width for 1oz copper foil is 0.02\" per amp to ensure the trace stays at a reasonable temperature. 0.03\" per amp or wider is recommended. Note that 1oz copper exhibits a sheet resistance of about 530μΩ/square. Small resistances can cause large errors in high current applications. Noise immunity will be improved signifi cantly by locating resistive dividers close to the pins with short VCC and GND traces.89Figure 8. Overvoltage Regulator with P-Channel MOSFET Reverse Input ProtectionSupply Transient ProtectionThe LT4356-1 is 100% tested and guaranteed to be safe from damage with supply voltages up to 80V. Neverthe-less, voltage transients above 100V may cause permanent damage. During a short-circuit condition, the large change in current fl owing through power supply traces and associ-ated wiring can cause inductive voltage transients which could exceed 100V. To minimize the voltage transients, the 43561fd13
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LT4356-1APPLICATIONS INFORMATION
Design ExampleAs a design example, take an application with the follow-ing specifi cations: VCC = 8V to 14V DC with transient up to 80V, VOUT ≤ 16V, current limit (ILIM) at 5A, low battery detection at 6V, and 1ms of overvoltage early warning (Figure 9).First, calculate the resistive divider value to limit VOUT to 16V during an overvoltage event: VREG=
1.25V •(R1 + R2)=16V
R2
CTMR is then chosen for 1ms of early warning time: CTMR =
1ms • 5µA
= 50nF
100mV
The closest standard value for CTMR is 47nF.Finally, calculate R4 and R5 for the 6V low battery threshold detection: 6V =
1.25V •(R4 + R5)R5
Choose 100kΩ for R5. R4 =
Set the current through R1 and R2 during the overvoltage condition to 250μA.R2 = 1.25V
= 5k250µA
(6V – 1.25V) • R5 = 380k
1.25V
Select 383kΩ for R4.The pass transistor, Q1, should be chosen to withstand the output short condition with VCC = 14V.The total overcurrent fault time is: tOC =
47nF • 0.85V
= 0.878ms
45.5μA
Choose 4.99kΩ for R2. R1 =
(16V – 1.25V) • R2 = 58.88k
1.25V
The closest standard value for R1 is 59kΩ.Next calculate the sense resistor, RSNS, value: RSNS =
50mV50mV
= = 10mILIM5A
The power dissipation on Q1 equals to: P =
14V • 50mV
= 70W
10m
These conditions are well within the Safe Operating Area of IRLR2908.43561fd14
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LT4356-1TYPICAL APPLICATIONS
24V Overvoltage Regulator Withstands 150V at VINVIN24VQ1IRF640R91k1W5SNS6D2*SMAT70A789SHDNFLTENGND10*DIODES INC.TMR143561 TA05VOUT
CLAMPED AT 32VR310Ω4GATE3OUTFB2R1118kVCCR24.99kLT4356DE-1CTMR0.1μF43561fd15
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LT4356-1TYPICAL APPLICATIONS
Overvoltage Regulator with Low Battery Detection and Output Keep Alive During Shutdown1k0.5WRSNS10mΩQ1IRLR2908C210μFQ2VN22223OUTFB2R2VDD24.9kR647kLBOD11N4746A18V1WVIN12VD2*SMAJ58AR4402kVOUT12V, 4ACLAMPED AT 16VR310Ω5SNSVCC4GATE6C20.1μFR610Ω12R5105k7R1294kIN+SHDNLT4356DE-1AOUTFLTGNDTMR1CTMR0.1μFEN43561 TA031189*DIODES INC.1043561fd16
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LT4356-1TYPICAL APPLICATIONS
2.5A, 48V Hot Swap with Overvoltage Output Regulation at 72V and UV Shutdown at 35VVIN48VD2*SMAT70ARSNS15mΩRS100ΩCS0.01μFQ1FDB3632R4140kC16.8nFR627kVOUT48V2.5ACL300μFR310ΩD11N4714BV = 33V7R847k6VCCSHDN54SNSGATE3OUTIN+12R71MR54.02kLT4356DE-189FB2R1226kR24.02kFLTENGND10TMR1AOUT43561 TA0611PWRGD*DIODES INC.CTMR0.1μF2.5A, 28V Hot Swap with Overvoltage Output Regulation at 36V and UV Shutdown at 15VRSNS15mΩRS100ΩCS0.01μFQ1FDB3632R4113kR627kVIN28VD2*SMAT70AVOUT28V2.5ACL300μFR310ΩC16.8nFD11N4700BV = 13V7R847k6VCCSHDN54SNSGATE3OUTIN+12R71MR54.02kLT4356DE-189FB2R1110kR24.02kFLTENGND10TMR1AOUT43561 TA0711PWRGD*DIODES INC.CTMR0.1μF43561fd17
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LT4356-1PACKAGE DESCRIPTION
DE/UE Package12-Lead Plastic DFN (4mm × 3mm)(Reference LTC DWG # 05-08-1695 Rev C)0.70 ±0.053.60 ±0.051.70 ±0.052.20 ±0.05(2 SIDES)PACKAGE OUTLINE0.25 ± 0.053.30 ±0.05(2 SIDES)0.50BSCRECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
4.00 ±0.10(2 SIDES)R = 0.05TYP3.00 ±0.10(2 SIDES)1.70 ± 0.05(2 SIDES)R = 0.115TYP0.40 ± 0.10127PIN 1TOP MARK(NOTE 6)PIN 1 NOTCHR = 0.20 OR0.35 × 45°CHAMFER60.25 ± 0.053.30 ±0.05(2 SIDES)10.50BSC(UE12/DE12) DFN 0905 REV C 0.200 REF0.75 ±0.050.00 – 0.05BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE A VARIATION OF VERSION(WGED) IN JEDEC PACKAGE OUTLINE M0-2292.DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
43561fd18
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LT4356-1PACKAGE DESCRIPTION
MS Package10-Lead Plastic MSOP(Reference LTC DWG # 05-08-1661)0.889 ± 0.127(.035 ± .005)5.23(.206)MIN3.20 – 3.45(.126 – .136)3.00 ± 0.102(.118 ± .004)(NOTE 3)0.500.305 ± 0.038(.0197)(.0120 ± .0015)BSCTYP
RECOMMENDED SOLDER PAD LAYOUT
1098760.497 ± 0.076(.0196 ± .003)REF0.254(.010)GAUGE PLANEDETAIL “A”
0° – 6° TYP4.90 ± 0.152(.193 ± .006)3.00 ± 0.102(.118 ± .004)(NOTE 4)123450.53 ± 0.152(.021 ± .006)DETAIL “A”0.18(.007)SEATINGPLANE0.17 – 0.27(.007 – .011)TYP0.1016 ± 0.0508(.004 ± .002)MSOP (MS) 0307 REV E1.10(.043)MAX0.86(.034)REFNOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006\") PER SIDE4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006\") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004\") MAX
0.50(.0197)BSC
43561fdInformation furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.19
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LT4356-1TYPICAL APPLICATION
Overvoltage Regulator with Linear Regulator Up to 100mAQ22N2905ARSNS10mΩQ1IRLR2908C510μF2.5V, 100mAVIN12VD2*SMAJ58AVOUT12V, 3ACLAMPED AT 16VR159k2R24.99kR6100k6C20.1μFR610Ω117VCC5SNSR310Ω4GATE3OUTFBLT4356DE-1AOUTSHDNGNDTMR1CTMR0.1μFIN+FLTEN43561 TA04R4249kR5249kC347nF1289*DIODES INC.10RELATED PARTS
PART NUMBERLT1641-1/LT1641-2LTC1696LTC1735LTC1778LTC2909LTC2912/LTC2913LTC2914DESCRIPTIONPositive High Voltage Hot Swap™ ControllersOvervoltage Protection ControllerHigh Effi ciency Synchronous Step-Down Switching RegulatorNo RSENSE™ Wide Input Range Synchronous Step-Down ControllerTriple/Dual Inputs UV/OV Negative MonitorSingle/Dual UV/OV Voltage MonitorQuad UV/OV MonitorCOMMENTSActive Current Limiting, Supplies From 9V to 80VThinSOT™ Package, 2.7V to 28VOutput Fault Protection, 16-Pin SSOPUp to 97% Effi ciency, 4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ (0.9)(VIN), IOUT Up to 20APin Selectable Input Polarity Allows Negative and OV MonitoringAds UV and OV Trip Values, ±1.5% Threshold AccuracyFor Positive and Negative Supplies4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 14V4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 10V, 80μA Quiescent CurrentSingle Channel LTC3827/LTC3827-14V ≤ VIN ≤ 60V, 1.23V ≤ VOUT ≤ 36V, 120μA Quiescent CurrentDual 180° Phased Controllers, VIN 4V to 24V, 97% Duty Cycle, 4mm × 4mm QFN-28, SSOP-28 PackagesFoldback Current Limiting, Open-Circuit and Overcurrent Fault Output, Up to 80V SupplyWide Operating Range 8.5V to 80VExternal N-channel MOSFETs Replace ORing Diodes, 1.2V to 20VControls Two N-Channel MOSFETs, 1μs Turn-Off, 80V OperationControls Two N-Channel MOSFETs, 0.5μs Turn-Off, 80V Operation43561fdLTC3727/LTC3727-12-Phase, Dual, Synchronous ControllerLTC3827/LTC3827-1Low IQ, Dual, Synchronous ControllerLTC3835/LTC3835-1Low IQ, Synchronous Step-Down ControllerLT3845LT3850LT4256LTC4260LT4351LTC4354LTC4355Low IQ, Synchronous Step-Down ControllerDual, 550kHz, 2-Phase Sychronous Step-Down ControllerPositive 48V Hot Swap Controller with Open-Circuit DetectPositive High Voltage Hot Swap Controller with ADC and I2CIdeal MOSFET ORing DiodeNegative Voltage Diode-OR ControllerPositive Voltage Diode-OR ControllerHot Swap, No RSENSE and ThinSOT are trademarks of Linear Technology Corporation.20
Linear Technology CorporationLT 0808 REV D • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com© LINEAR TECHNOLOGY CORPORATION 2007
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