Method of forming semiconductor device including s

专利名称：Method of forming semiconductor device

including silicon oxide with fluorine,

embedded wiring layer, via holes, and wiringgrooves

发明人：Takayuki Oshima,Hiroshi Miyazaki,Hideo

Aoki,Kazutoshi Ohmori

申请号：US09987914申请日：20011116公开号：US06812127B2公开日：20041102

专利附图：

摘要：An interlayer dielectric film that surrounds via holes for connecting wirings of asecond wiring layer and the wirings of third wiring layer is constituted of a dielectricmaterial having a relatively smaller Young's modulus compared with the Young'smodulus of a dielectric material constituting a dielectric film that surrounds wiringgrooves in dual damascene wirings, which can improve the heat resistance andelectromigration resistance of the dual damascene wirings.

申请人：RENESAS TECHNOLOGY CORP.

代理机构：Reed Smith LLP

代理人：Stanley P. Fisher, Esq.,Juan Carlos A. Marquez, Esq.

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