元器件交易网www.cecb2b.comSN74ALVC16424516ĆBIT 2.5ĆV TO 3.3ĆV/3.3ĆV TO 5ĆV LEVELĆSHIFTING TRANSCEIVERWITH 3ĆSTATE OUTPUTSSCAS416L − MARCH 1994 − REVISED FEBRUARY 2004DMember of the Texas InstrumentsDDDWidebus FamilyMax tpd of 5.8 ns at 3.3 V±24-mA Output Drive at 3.3 VLatch-Up Performance Exceeds 250 mA PerJESD 17DGG OR DL PACKAGE(TOP VIEW)description/ordering informationThis 16-bit (dual-octal) noninverting bustransceiver contains two separate supply rails.B port has VCCB, which is set to operate at 3.3 Vand 5 V. A port has VCCA, which is set to operateat 2.5 V and 3.3 V. This allows for translation froma 2.5-V to a 3.3-V environment, and vice versa, orfrom a 3.3-V to a 5-V environment, and vice versa.The SN74ALVC164245 is designed forasynchronous communication between databuses.To ensure the high-impedance state during powerup or power down, the output-enable (OE) inputshould be tied to VCC through a pullup resistor; theminimum value of the resistor is determined by thecurrent-sinking capability of the driver.1DIR1B11B2GND1B31B4(3.3 V, 5 V) VCCB1B51B6GND1B71B82B12B2GND2B32B4(3.3 V, 5 V) VCCB2B52B6GND2B72B82DIR1234567891011121314151617181920212223244847464544434241403938373635343332313029282726251OE1A11A2GND1A31A4VCCA (2.5 V, 3.3 V)1A51A6GND1A71A82A12A2GND2A32A4VCCA (2.5 V, 3.3 V)2A52A6GND2A72A82OEORDERING INFORMATIONTASSOP − DL−40°C to 85°CTSSOP − DGGVFBGA − GQLVFBGA − ZQL (Pb-free)PACKAGE†Tube of 25Reel of 1000Reel of 2000Reel of 250Reel of 1000ORDERABLEPART NUMBERSN74ALVC164245DLSN74ALVC164245DLRSN74ALVC164245DGGRSN74ALVC164245DGGTSN74ALVC164245KR74ALVC164245ZQLRTOP-SIDEMARKINGALVC164245ALVC164245VC4245†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines areavailable at www.ti.com/sc/package.FUNCTION TABLE(each 8-bit section)INPUTSOELLHDIRLHXOPERATIONB data to A busA data to B busIsolationPlease be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.Widebus is a trademark of Texas Instruments.PRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.Copyright 2004, Texas Instruments IncorporatedPOST OFFICE BOX 655303 DALLAS, TEXAS 75265•1元器件交易网www.cecb2b.comSCAS416L − MARCH 1994 − REVISED FEBRUARY 2004SN74ALVC16424516ĆBIT 2.5ĆV TO 3.3ĆV/3.3ĆV TO 5ĆV LEVELĆSHIFTING TRANSCEIVERWITH 3ĆSTATE OUTPUTSGQL OR ZQL PACKAGE(TOP VIEW)1ABCDEFGHJK23456terminal assignments1ABCDEFGHJK1DIR1B21B41B61B82B12B32B52B72DIR2NC1B11B31B51B72B22B42B62B8NCGNDVCCBGNDNCGNDVCCAGNDNC3NCGNDVCCBGND4NCGNDVCCAGND5NC1A11A31A51A72A22A42A62A8NC61OE1A21A41A61A82A12A32A52A72OENC − No internal connectionlogic diagram (positive logic)1DIR12DIR48241OE252OE1A1472A13621B1132B1To Seven Other ChannelsPin numbers shown are for the DGG and DL packages.To Seven Other Channels2POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.comSN74ALVC16424516ĆBIT 2.5ĆV TO 3.3ĆV/3.3ĆV TO 5ĆV LEVELĆSHIFTING TRANSCEIVERWITH 3ĆSTATE OUTPUTSSCAS416L − MARCH 1994 − REVISED FEBRUARY 2004absolute maximum ratings over operating free-air temperature range for VCCB at 5 V andVCCA at 3.3 V (unless otherwise noted)†Supply voltage range:VCCA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 VVCCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6 VInput voltage range, VI:Except I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6 VI/O port A (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCCA + 0.5 VI/O port B (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCCB + 0.5 VInput clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mAOutput clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mAContinuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mAContinuous current through each VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mAPackage thermal impedance, θJA (see Note 3):DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/WDL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63°C/WGQL/ZQL package . . . . . . . . . . . . . . . . . . . . . . . . . . . 42°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . °C to 150°CStorage temperature range, Tstg −65†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.NOTES:1.This value is limited to 6 V maximum.2.This value is limited to 4.6 V maximum.3.The package thermal impedance is calculated in accordance with JESD 51-7.recommended operating conditions for VCCB at 3.3 V and 5 V (see Note 4)MINVCCBVIHVILVIAVOBIOHIOL∆t/∆vSupply voltageHigh-level input voltageLow-level input voltageInput voltageOutput voltageHigh-level output currentLow-level output currentInput transition rise or fall rateVCCB = 3 V to 3.6 VVCCB = 4.5 V to 5.5 V00320.70.8VCCBVCCB−242410MAX5.5UNITVVVVVmAmAns/VTAOperating free-air temperature−4085°CNOTE 4:All unused inputs of the device must be held at the associated VCC or GND to ensure proper device operation. Refer to the TI applicationreport, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.POST OFFICE BOX 655303 DALLAS, TEXAS 75265•3元器件交易网www.cecb2b.comSCAS416L − MARCH 1994 − REVISED FEBRUARY 2004SN74ALVC16424516ĆBIT 2.5ĆV TO 3.3ĆV/3.3ĆV TO 5ĆV LEVELĆSHIFTING TRANSCEIVERWITH 3ĆSTATE OUTPUTSrecommended operating conditions for VCCA at 2.5 V and 3.3 V (see Note 4)MINVCCAVIHVILVIBVOAIOHIOL∆t/∆vSupply voltageHigh-level input voltageLow-level input voltageInput voltageOutput voltageHigh-level output currentLow-level output currentInput transition rise or fall rateVCCA = 2.3 VVCCA = 3 VVCCA = 2.3 VVCCA = 3 VVCCA = 2.3 V to 2.7 VVCCA = 3 V to 3.6 VVCCA = 2.3 V to 2.7 VVCCA = 3 V to 3.6 V002.31.720.70.8VCCAVCCA−18−24182410MAX3.6UNITVVVVVmAmAns/VTAOperating free-air temperature−4085°CNOTE 4:All unused inputs of the device must be held at the associated VCC or GND to ensure proper device operation. Refer to the TI applicationreport, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.electrical characteristics over recommended operating free-air temperature range forVCCA = 2.7 V to 3.6 V and VCCB = 4.5 V to 5.5 V (unless otherwise noted)PARAMETERTEST CONDITIONSIOH = −100 µAVOH (B to A)IOH = −12 mAIOH = −24 mAIOH = −100 µAVOH (A to B)IOH = −24 mAIOL = 100 µAIOL = 12 mAIOL = 24 mAIOL = 100 µAIOL = 24 mAVI = VCCA/VCCB or GNDVO = VCCA/VCCB or GNDVI = VCCA/VCCB or GND, IO = 0One input at VCCA/VCCB − 0.6 V,Other inputs at VCCA/VCCB or GNDControl inputsA or B portsVI = VCCA/VCCB or GNDVO = VCCA/VCCB or GND2.7 V to 3.6 V2.7 V3 V4.5 V to 5.5 V4.5 V to 5.5 V3.6 V3.6 V5.5 V3 V to 3.6 V3.3 V3.3 V5.5 V5.5 V5.5 V4.5 V to 5.5 V5 V3.3 V6.58.5VCCA2.7 V to 3.6 V2.7 V3 V3 V4.5 V5.5 V4.5 V5.5 VVCCBMINTYP†MAXUNITVCC−0.22.22.424.35.33.74.70.20.40.550.20.55±5±1040750VµAµAµAµApFpFVVVVOL (B to A)VOL (A to B)IIIOZ‡ICC∆ICC§CiCioControl inputsA or B ports†Typical values are measured at VCCA = 3.3 V and VCCB = 5 V, TA = 25°C.‡For I/O ports, the parameter IOZ includes the input leakage current.§This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than at 0 or the associated VCC.4POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.comSN74ALVC16424516ĆBIT 2.5ĆV TO 3.3ĆV/3.3ĆV TO 5ĆV LEVELĆSHIFTING TRANSCEIVERWITH 3ĆSTATE OUTPUTSSCAS416L − MARCH 1994 − REVISED FEBRUARY 2004electrical characteristics over recommended operating free-air temperature range forVCCA = 2.3 V to 2.7 V and VCCB = 3 V to 3.6 V (unless otherwise noted)PARAMETERVOH (B to A)TEST CONDITIONSIOH = −100 µAIOH = −8 mAIOH = −12 mAIOH = −100 µAIOH = −18 mAIOL = 100 µAIOL = 12 mAIOL = 100 µAIOL = 18 mAVI = VCCA/VCCB or GNDVO = VCCA/VCCB or GNDVI = VCCA/VCCB or GND, IO = 0One input at VCCA/VCCB − 0.6 V,Other inputs at VCCA/VCCB or GNDVCCA2.3 V to 2.7 V2.3 V2.7 V2.3 V to 2.7 V2.3 V to 2.7 V2.3 V to 2.7 V2.3 V2.3 V to 2.7 V2.3 V2.3 V to 2.7 V2.3 V to 2.7 V2.3 V to 2.7 V2.3 V to 2.7 VVCCB3 V to 3.6 V3 V to 3.6 V3 V to 3.6 V3 V to 3.6 V3 V3 V to 3.6 V3 V to 3.6 V3 V to 3.6 V3 V3 V to 3.6 V3 V to 3.6 V3 V to 3.6 V3 V to 3.6 VMINVCCA−0.21.71.8VCCB−0.22.20.20.60.20.55±5±1020750VVVµAµAµAµAMAXUNITVVOH (A to B)VOL (B to A)VOL (A to B)IIIOZ†ICC∆ICC‡Control inputsA or B ports†For I/O ports, the parameter IOZ includes the input leakage current.‡This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than at 0 or the associated VCC.switching characteristics over recommended operating free-air temperature range (unlessotherwise noted) (see Figures 1-4)VCCB = 3.3 V± 0.3 VVCCA = 2.5 V± 0.2 VMINtpdtentdistentdisABOEOEOEOEBABBAAMAX7.67.611.510.512.39.3VCCB = 5 V ± 0.5 VVCCA = 2.7 VMINMAX5.96.79.39.210.29VCCA = 3.3 V± 0.3 VMIN11.212.122.9MAX5.85.88.99.59.18.6nsnsnsnsnsUNITPARAMETERFROM(INPUT)TO(OUTPUT)operating characteristics, TA = 25°CPARAMETEROutputs enabled (B)CpdPower dissipationcapacitanceOutputs disabled (B)Outputs enabled (A)Outputs disabled (A)TEST CONDITIONSVCCB = 3.3 VVCCA = 2.5 VTYPCL = 50 pF,CL = 50 pF,f = 10 MHzf = 10 MHz552711858VCCB = 5 VVCCA = 3.3 VTYP566566pFUNITPOST OFFICE BOX 655303 DALLAS, TEXAS 75265•5元器件交易网www.cecb2b.comSCAS416L − MARCH 1994 − REVISED FEBRUARY 2004SN74ALVC16424516ĆBIT 2.5ĆV TO 3.3ĆV/3.3ĆV TO 5ĆV LEVELĆSHIFTING TRANSCEIVERWITH 3ĆSTATE OUTPUTSpower-up considerations†TI level-translation devices offer an opportunity for successful mixed-voltage signal design. A proper power-upsequence always should be followed to avoid excessive supply current, bus contention, oscillations, or otheranomalies caused by improperly biased device pins. Take these precautions to guard against such power-upproblems:1.Connect ground before any supply voltage is applied.2.Power up the control side of the device (VCCA for all four of these devices).3.Tie OE to VCCA with a pullup resistor so that it ramps with VCCA.4.Depending on the direction of the data path, DIR can be high or low. If DIR high is needed (A data to B bus),ramp it with VCCA. Otherwise, keep DIR low.†Refer to the TI application report, Texas Instruments Voltage-Level-Translation Devices, literature number SCEA021.6POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.comSN74ALVC16424516ĆBIT 2.5ĆV TO 3.3ĆV/3.3ĆV TO 5ĆV LEVELĆSHIFTING TRANSCEIVERWITH 3ĆSTATE OUTPUTSSCAS416L − MARCH 1994 − REVISED FEBRUARY 2004PARAMETER MEASUREMENT INFORMATIONVCCA= 2.5 V ± 0.2 V TO VCCB= 3.3 V ± 0.3 VVCCB = 6 VFrom OutputUnder TestCL = 30 pF(see Note A)500 ΩS1OpenGND500 ΩTESTtpdtPLZ/tPZLtPHZ/tPZHS1OpenVCCB = 6 VGNDLOAD CIRCUITOutputControl(low-levelenabling)tPZLVCCA0 VtPLHOutputtPHLVOHB1.5 VVOLTAGE WAVEFORMSPROPAGATION DELAY TIMES1.5 VVOLBOutputWaveform 1S1 at 6 V(see Note B)OutputWaveform 2S1 at GND(see Note B)tPZH1.5 V1.5 VVCCAVCCA/2VCCA/20 VtPLZVCCBVOL + 0.3 VtPHZVOH − 0.3 VVOHB0 VVOLTAGE WAVEFORMSENABLE AND DISABLE TIMESVOLBInputVCCA/2VCCA/2NOTES:A.CL includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR≤10 MHz, ZO = 50 Ω, tr≤2 ns, tf≤2 ns.D.The outputs are measured one at a time, with one transition per measurement.E.tPLZ and tPHZ are the same as tdis.F.tPZL and tPZH are the same as ten.G.tPLH and tPHL are the same as tpd.Figure 1. Load Circuit and Voltage WaveformsPOST OFFICE BOX 655303 DALLAS, TEXAS 75265•7元器件交易网www.cecb2b.comSCAS416L − MARCH 1994 − REVISED FEBRUARY 2004SN74ALVC16424516ĆBIT 2.5ĆV TO 3.3ĆV/3.3ĆV TO 5ĆV LEVELĆSHIFTING TRANSCEIVERWITH 3ĆSTATE OUTPUTSPARAMETER MEASUREMENT INFORMATIONVCCB = 3.3 V ± 0.3 V TO VCCA = 2.5 V ± 0.2 V500 ΩS12 × VCCAOpenGND500 ΩTESTtpdtPLZ/tPZLtPHZ/tPZHS1Open2 × VCCAGNDFrom OutputUnder TestCL = 30 pF(see Note A)LOAD CIRCUITOutputControl(low-levelenabling)tPZL2.7 VInput1.5 V1.5 V0 VtPLHOutputVCCA/2VOLTAGE WAVEFORMSPROPAGATION DELAY TIMEStPHLVOHAVCCA/2VOLAOutputWaveform 2S1 at GND(see Note B)OutputWaveform 1S1 at 2 × VCCA(see Note B)tPZHVCCA/22.7 V1.5 V1.5 V0 VtPLZVCCAVCCA/2VOL + 0.15 VVOLAtPHZVOHAVOH − 0.15 V0 VVOLTAGE WAVEFORMSENABLE AND DISABLE TIMESNOTES:A.CL includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR≤10 MHz, ZO = 50 Ω, tr≤2 ns, tf≤2 ns.D.The outputs are measured one at a time, with one transition per measurement.E.tPLZ and tPHZ are the same as tdis.F.tPZL and tPZH are the same as ten.G.tPLH and tPHL are the same as tpd.Figure 2. Load Circuit and Voltage Waveforms8POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.comSN74ALVC16424516ĆBIT 2.5ĆV TO 3.3ĆV/3.3ĆV TO 5ĆV LEVELĆSHIFTING TRANSCEIVERWITH 3ĆSTATE OUTPUTSSCAS416L − MARCH 1994 − REVISED FEBRUARY 2004PARAMETER MEASUREMENT INFORMATIONVCCA = 3.3 V ± 0.3 V TO VCCB = 5 V ± 0.5 V2 VCCBFrom OutputUnder TestCL = 50 pF(see Note A)500 ΩS1OpenGND500 ΩOutputControl(low-levelenabling)tPZL2.7 VInput1.5 VtPLH1.5 V0 VtPHLVOH50% VCCBVOLOutputWaveform 2S1 at GND(see Note B)OutputWaveform 1S1 at 2 VCCB(see Note B)tPZH50% VCCB2.7 V1.5 V1.5 V0 VtPLZ≈VCCB20% VCCBtPHZ80% VCCBVOH0 VVOLTAGE WAVEFORMSENABLE AND DISABLE TIMESVOLTESTtpdtPLZ/tPZLtPHZ/tPZHS1Open2 VCCBGNDLOAD CIRCUITOutput50% VCCBVOLTAGE WAVEFORMSPROPAGATION DELAY TIMES50% VCCBNOTES:A.CL includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤2.5 ns, tf ≤2.5 ns.D.The outputs are measured one at a time, with one transition per measurement.E.tPLZ and tPHZ are the same as tdis.F.tPZL and tPZH are the same as ten.G.tPLH and tPHL are the same as tpd.Figure 3. Load Circuit and Voltage WaveformsPOST OFFICE BOX 655303 DALLAS, TEXAS 75265•9元器件交易网www.cecb2b.comSCAS416L − MARCH 1994 − REVISED FEBRUARY 2004SN74ALVC16424516ĆBIT 2.5ĆV TO 3.3ĆV/3.3ĆV TO 5ĆV LEVELĆSHIFTING TRANSCEIVERWITH 3ĆSTATE OUTPUTSPARAMETER MEASUREMENT INFORMATIONVCCB = 5 V ± 0.5 V TO VCCA = 2.7 V AND 3.3 V ± 0.3 V500 ΩS1VCCA = 6 VOpenGND500 ΩOutputControl(low-levelenabling)tPZL3 VInput1.5 V1.5 V0 VtPLHOutput1.5 VVOLTAGE WAVEFORMSPROPAGATION DELAY TIMEStPHLVOHA1.5 VVOLAOutputWaveform 2S1 at GND(see Note B)OutputWaveform 1S1 at 6 V(see Note B)tPZH1.5 V3 V1.5 V1.5 V0 VtPLZ≈3 V1.5 VVOL + 0.3 VVOLAtPHZVOHAVOH − 0.3 V0 VVOLTAGE WAVEFORMSENABLE AND DISABLE TIMESTESTtpdtPLZ/tPZLtPHZ/tPZHS1OpenVCCA = 6 VGNDFrom OutputUnder TestCL = 50 pF(see Note A)LOAD CIRCUITNOTES:A.CL includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR ≤10 MHz, ZO = 50 Ω, tr ≤2.5 ns, tf ≤2.5 ns.D.The outputs are measured one at a time, with one transition per measurement.E.tPLZ and tPHZ are the same as tdis.F.tPZL and tPZH are the same as ten.G.tPLH and tPHL are the same as tpd.Figure 4. Load Circuit and Voltage Waveforms10POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.com
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元器件交易网www.cecb2b.com MSSO001C – JANUARY 1995 – REVISED DECEMBER 2001 MECHANICAL DATA DL (R-PDSO-G**) 48 PINS SHOWN0.025 (0,635)PLASTIC SMALL-OUTLINE PACKAGE0.0135 (0,343)0.008 (0,203)250.005 (0,13)M480.010 (0,25)0.005 (0,13)0.299 (7,59)0.291 (7,39)0.420 (10,67)0.395 (10,03)Gage Plane0.010 (0,25)1A240°–ā8°0.040 (1,02)0.020 (0,51)Seating Plane0.110 (2,79) MAX0.008 (0,20) MIN0.004 (0,10)PINS **DIMA MAX280.380(9,65)0.370(9,40)480.630(16,00)0.620(15,75)560.730(18,54)0.720(18,29)4040048/E 12/01A MINNOTES:A.B.C.D.All linear dimensions are in inches (millimeters).This drawing is subject to change without notice.Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).Falls within JEDEC MO-118POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.comMTSS003D – JANUARY 1995 – REVISED JANUARY 1998 MECHANICAL DATA DGG (R-PDSO-G**) 48 PINS SHOWNPLASTIC SMALL-OUTLINE PACKAGE0,50480,270,17250,08M6,206,008,307,900,15 NOMGage Plane0,250°–8°A0,750,50124Seating Plane1,20 MAX0,150,05PINS **DIMA MAX0,1048566412,6014,1017,10A MIN12,4013,9016,904040078/F 12/97NOTES:A.B.C.D.All linear dimensions are in millimeters.This drawing is subject to change without notice.Body dimensions do not include mold protrusion not to exceed 0,15.Falls within JEDEC MO-153POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.com
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